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/*
* Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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#ifndef CPU_X86_VM_RELOCINFO_X86_HPP
#define CPU_X86_VM_RELOCINFO_X86_HPP
// machine-dependent parts of class relocInfo
private:
enum {
// Intel instructions are byte-aligned.
offset_unit = 1,
// Encodes Assembler::disp32_operand vs. Assembler::imm32_operand.
#ifndef AMD64
format_width = 1
#else
// vs Assembler::narrow_oop_operand.
format_width = 2
#endif
};
#endif // CPU_X86_VM_RELOCINFO_X86_HPP