tree 155e0141f1e45f96a3653a26e8ddb2a8baa8ba30
parent 6d8f809cb55a8fc0ebfae27984215e4a0b201984
parent b390e0bfd2996f1215231395f4e25a4c011eeaf9
author Linus Torvalds <torvalds@linux-foundation.org> 1565479907 -0700
committer Linus Torvalds <torvalds@linux-foundation.org> 1565479907 -0700
mergetag object b390e0bfd2996f1215231395f4e25a4c011eeaf9
 type commit
 tag riscv/for-v5.3-rc4
 tagger Paul Walmsley <paul.walmsley@sifive.com> 1565473307 -0700
 
 RISC-V updates for v5.3-rc4
 
 A few minor RISC-V updates for v5.3-rc4:
 
 - Remove __udivdi3() from the 32-bit Linux port, converting the only
   upstream user to use do_div(), per Linux policy
 
 - Convert the RISC-V standard clocksource away from per-cpu data structures,
   since only one is used by Linux, even on a multi-CPU system
 
 - A set of DT binding updates that remove an obsolete text binding in
   favor of a YAML binding, fix a bogus compatible string in the schema
     (thus fixing a "make dtbs_check" warning), and clarifies the future
       values expected in one of the RISC-V CPU properties
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Merge tag 'riscv/for-v5.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Paul Walmsley:
 "A few minor RISC-V updates for v5.3-rc4:

   - Remove __udivdi3() from the 32-bit Linux port, converting the only
     upstream user to use do_div(), per Linux policy

   - Convert the RISC-V standard clocksource away from per-cpu data
     structures, since only one is used by Linux, even on a multi-CPU
     system

   - A set of DT binding updates that remove an obsolete text binding in
     favor of a YAML binding, fix a bogus compatible string in the
     schema (thus fixing a "make dtbs_check" warning), and clarifies the
     future values expected in one of the RISC-V CPU properties"

* tag 'riscv/for-v5.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  dt-bindings: riscv: fix the schema compatible string for the HiFive Unleashed board
  dt-bindings: riscv: remove obsolete cpus.txt
  RISC-V: Remove udivdi3
  riscv: delay: use do_div() instead of __udivdi3()
  dt-bindings: Update the riscv,isa string description
  RISC-V: Remove per cpu clocksource