// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2019 MediaTek Inc.
 * Author: Ryder Lee <ryder.lee@mediatek.com>
 */

/dts-v1/;
#include <dt-bindings/input/input.h>
#include "mt7629.dtsi"

/ {
	model = "MediaTek MT7629 reference board";
	compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	gpio-keys {
		compatible = "gpio-keys";

		reset {
			label = "factory";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 60 GPIO_ACTIVE_LOW>;
		};

		wps {
			label = "wps";
			linux,code = <KEY_WPS_BUTTON>;
			gpios = <&pio 58 GPIO_ACTIVE_LOW>;
		};
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0x40000000 0x10000000>;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_5v: regulator-5v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-5V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

&eth {
	pinctrl-names = "default";
	pinctrl-0 = <&eth_pins>;
	pinctrl-1 = <&ephy_leds_pins>;
	status = "okay";

	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		phy-handle = <&phy0>;
	};

	mdio: mdio-bus {
		#address-cells = <1>;
		#size-cells = <0>;

		phy0: ethernet-phy@0 {
			reg = <0>;
			phy-mode = "gmii";
		};
	};
};

&i2c {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c_pins>;
	status = "okay";
};

&qspi {
	pinctrl-names = "default";
	pinctrl-0 = <&qspi_pins>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x00000 0x60000>;
				read-only;
			};

			partition@60000 {
				label = "u-boot-env";
				reg = <0x60000 0x10000>;
				read-only;
			};

			factory: partition@70000 {
				label = "factory";
				reg = <0x70000 0x40000>;
				read-only;
			};

			partition@b0000 {
				label = "kernel";
				reg = <0xb0000 0xb50000>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie_pins>;
};

&pciephy1 {
	status = "okay";
};

&pio {
	eth_pins: eth-pins {
		mux {
			function = "eth";
			groups = "mdc_mdio";
		};
	};

	ephy_leds_pins: ephy-leds-pins {
		mux {
			function = "led";
			groups = "gphy_leds_0", "ephy_leds";
		};
	};

	i2c_pins: i2c-pins {
		mux {
			function = "i2c";
			groups =  "i2c_0";
		};

		conf {
			pins = "I2C_SDA", "I2C_SCL";
			drive-strength = <4>;
			bias-disable;
		};
	};

	pcie_pins: pcie-pins {
		mux {
			function = "pcie";
			groups = "pcie_clkreq",
				 "pcie_pereset",
				 "pcie_wake";
		};
	};

	pwm_pins: pwm-pins {
		mux {
			function = "pwm";
			groups = "pwm_0";
		};
	};

	/* SPI-NOR is shared pin with serial NAND */
	qspi_pins: qspi-pins {
		mux {
			function = "flash";
			groups = "spi_nor";
		};
	};

	/* Serial NAND is shared pin with SPI-NOR */
	serial_nand_pins: serial-nand-pins {
		mux {
			function = "flash";
			groups = "snfi";
		};
	};

	spi_pins: spi-pins {
		mux {
			function = "spi";
			groups = "spi_0";
		};
	};

	uart0_pins: uart0-pins {
		mux {
			function = "uart";
			groups = "uart0_txd_rxd" ;
		};
	};

	uart1_pins: uart1-pins {
		mux {
			function = "uart";
			groups = "uart1_0_tx_rx" ;
		};
	};

	uart2_pins: uart2-pins {
		mux {
			function = "uart";
			groups = "uart2_0_txd_rxd" ;
		};
	};

	watchdog_pins: watchdog-pins {
		mux {
			function = "watchdog";
			groups = "watchdog";
		};
	};
};

&spi {
	pinctrl-names = "default";
	pinctrl-0 = <&spi_pins>;
	status = "okay";
};

&ssusb {
	vusb33-supply = <&reg_3p3v>;
	vbus-supply = <&reg_5v>;
	status = "okay";
};

&u3phy0 {
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
};

&watchdog {
	pinctrl-names = "default";
	pinctrl-0 = <&watchdog_pins>;
	status = "okay";
};