| // SPDX-License-Identifier: GPL-2.0-only |
| /* |
| * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ |
| */ |
| #include "dra72-evm-common.dtsi" |
| #include "dra72x-mmc-iodelay.dtsi" |
| #include <dt-bindings/net/ti-dp83867.h> |
| |
| / { |
| model = "TI DRA722 Rev C EVM"; |
| |
| memory@0 { |
| device_type = "memory"; |
| reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ |
| }; |
| |
| evm_1v8_sw: fixedregulator-evm_1v8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "evm_1v8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| vin-supply = <&smps4_reg>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| }; |
| |
| &i2c1 { |
| tps65917: tps65917@58 { |
| reg = <0x58>; |
| |
| interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ |
| }; |
| }; |
| |
| #include "dra72-evm-tps65917.dtsi" |
| |
| &ldo2_reg { |
| /* LDO2_OUT --> VDDA_1V8_PHY2 */ |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| &hdmi { |
| vdda-supply = <&ldo2_reg>; |
| }; |
| |
| &pcf_gpio_21 { |
| interrupt-parent = <&gpio3>; |
| interrupts = <30 IRQ_TYPE_EDGE_FALLING>; |
| }; |
| |
| &mac { |
| mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, |
| <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ |
| <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */ |
| dual_emac; |
| }; |
| |
| &cpsw_emac0 { |
| phy-handle = <&dp83867_0>; |
| phy-mode = "rgmii-id"; |
| dual_emac_res_vlan = <1>; |
| }; |
| |
| &cpsw_emac1 { |
| phy-handle = <&dp83867_1>; |
| phy-mode = "rgmii-id"; |
| dual_emac_res_vlan = <2>; |
| }; |
| |
| &davinci_mdio { |
| dp83867_0: ethernet-phy@2 { |
| reg = <2>; |
| ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; |
| ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; |
| ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; |
| ti,min-output-impedance; |
| interrupt-parent = <&gpio6>; |
| interrupts = <16 IRQ_TYPE_EDGE_FALLING>; |
| ti,dp83867-rxctrl-strap-quirk; |
| }; |
| |
| dp83867_1: ethernet-phy@3 { |
| reg = <3>; |
| ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; |
| ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; |
| ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; |
| ti,min-output-impedance; |
| interrupt-parent = <&gpio6>; |
| interrupts = <16 IRQ_TYPE_EDGE_FALLING>; |
| ti,dp83867-rxctrl-strap-quirk; |
| }; |
| }; |
| |
| &mmc1 { |
| pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; |
| pinctrl-0 = <&mmc1_pins_default>; |
| pinctrl-1 = <&mmc1_pins_hs>; |
| pinctrl-2 = <&mmc1_pins_sdr12>; |
| pinctrl-3 = <&mmc1_pins_sdr25>; |
| pinctrl-4 = <&mmc1_pins_sdr50>; |
| pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>; |
| pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; |
| vqmmc-supply = <&ldo1_reg>; |
| }; |
| |
| &mmc2 { |
| pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; |
| pinctrl-0 = <&mmc2_pins_default>; |
| pinctrl-1 = <&mmc2_pins_hs>; |
| pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; |
| pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>; |
| vmmc-supply = <&evm_1v8_sw>; |
| }; |
