| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright (C) 2017 exceet electronics GmbH |
| * Copyright (C) 2018 Kontron Electronics GmbH |
| * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org> |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| |
| / { |
| gpio-leds { |
| compatible = "gpio-leds"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_gpio_leds>; |
| |
| led1 { |
| label = "debug-led1"; |
| gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| linux,default-trigger = "heartbeat"; |
| }; |
| |
| led2 { |
| label = "debug-led2"; |
| gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| }; |
| |
| led3 { |
| label = "debug-led3"; |
| gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| }; |
| }; |
| |
| pwm-beeper { |
| compatible = "pwm-beeper"; |
| pwms = <&pwm8 0 5000>; |
| }; |
| |
| reg_3v3: regulator-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "3v3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| reg_5v: regulator-5v { |
| compatible = "regulator-fixed"; |
| regulator-name = "5v"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| }; |
| |
| reg_usb_otg1_vbus: regulator-usb-otg1-vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg1_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| reg_vref_adc: regulator-vref-adc { |
| compatible = "regulator-fixed"; |
| regulator-name = "vref-adc"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| }; |
| |
| &adc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_adc1>; |
| num-channels = <3>; |
| vref-supply = <®_vref_adc>; |
| status = "okay"; |
| }; |
| |
| &can2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan2>; |
| status = "okay"; |
| }; |
| |
| &ecspi1 { |
| cs-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi1>; |
| status = "okay"; |
| |
| eeprom@0 { |
| compatible = "anvo,anv32e61w", "atmel,at25"; |
| reg = <0>; |
| spi-max-frequency = <20000000>; |
| spi-cpha; |
| spi-cpol; |
| pagesize = <1>; |
| size = <8192>; |
| address-width = <16>; |
| }; |
| }; |
| |
| &fec1 { |
| pinctrl-0 = <&pinctrl_enet1>; |
| /delete-node/ mdio; |
| }; |
| |
| &fec2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>; |
| phy-mode = "rmii"; |
| phy-handle = <ðphy2>; |
| status = "okay"; |
| |
| mdio { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| ethphy1: ethernet-phy@1 { |
| reg = <1>; |
| micrel,led-mode = <0>; |
| clocks = <&clks IMX6UL_CLK_ENET_REF>; |
| clock-names = "rmii-ref"; |
| }; |
| |
| ethphy2: ethernet-phy@2 { |
| reg = <2>; |
| micrel,led-mode = <0>; |
| clocks = <&clks IMX6UL_CLK_ENET2_REF>; |
| clock-names = "rmii-ref"; |
| }; |
| }; |
| }; |
| |
| &i2c1 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| status = "okay"; |
| }; |
| |
| &i2c4 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c4>; |
| status = "okay"; |
| |
| rtc@32 { |
| compatible = "epson,rx8900"; |
| reg = <0x32>; |
| }; |
| }; |
| |
| &pwm8 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm8>; |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| linux,rs485-enabled-at-boot-time; |
| rs485-rx-during-tx; |
| rs485-rts-active-low; |
| uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &uart3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart3>; |
| fsl,uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &uart4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart4>; |
| status = "okay"; |
| }; |
| |
| &usbotg1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg1>; |
| dr_mode = "otg"; |
| srp-disable; |
| hnp-disable; |
| adp-disable; |
| over-current-active-low; |
| vbus-supply = <®_usb_otg1_vbus>; |
| status = "okay"; |
| }; |
| |
| &usbotg2 { |
| dr_mode = "host"; |
| disable-over-current; |
| vbus-supply = <®_5v>; |
| status = "okay"; |
| }; |
| |
| &usdhc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc1>; |
| cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
| keep-power-in-suspend; |
| wakeup-source; |
| vmmc-supply = <®_3v3>; |
| voltage-ranges = <3300 3300>; |
| no-1-8-v; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc2>; |
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>; |
| non-removable; |
| keep-power-in-suspend; |
| wakeup-source; |
| vmmc-supply = <®_3v3>; |
| voltage-ranges = <3300 3300>; |
| no-1-8-v; |
| status = "okay"; |
| }; |
| |
| &wdog1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_wdog>; |
| fsl,ext-reset-output; |
| status = "okay"; |
| }; |
| |
| &iomuxc { |
| pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>; |
| |
| pinctrl_adc1: adc1grp { |
| fsl,pins = < |
| MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 |
| MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 |
| MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0xb0 |
| >; |
| }; |
| |
| pinctrl_ecspi1: ecspi1grp { |
| fsl,pins = < |
| MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1 |
| MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1 |
| MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1 |
| MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x100b1 /* ECSPI1-CS1 */ |
| >; |
| }; |
| |
| pinctrl_enet2: enet2grp { |
| fsl,pins = < |
| MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 |
| MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 |
| MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 |
| MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 |
| MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 |
| MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 |
| MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 |
| MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b009 |
| >; |
| }; |
| |
| pinctrl_enet2_mdio: enet2mdiogrp { |
| fsl,pins = < |
| MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 |
| MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_flexcan2: flexcan2grp{ |
| fsl,pins = < |
| MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 |
| MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 |
| >; |
| }; |
| |
| pinctrl_gpio: gpiogrp { |
| fsl,pins = < |
| MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */ |
| MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */ |
| MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */ |
| MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */ |
| >; |
| }; |
| |
| pinctrl_gpio_leds: gpioledsgrp { |
| fsl,pins = < |
| MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b0b0 /* LED H14 */ |
| MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0 /* LED H15 */ |
| MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 /* LED H16 */ |
| >; |
| }; |
| |
| pinctrl_i2c1: i2c1grp { |
| fsl,pins = < |
| MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0 |
| MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0 |
| >; |
| }; |
| |
| pinctrl_i2c4: i2c4grp { |
| fsl,pins = < |
| MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001f8b0 |
| MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001f8b0 |
| >; |
| }; |
| |
| pinctrl_pwm8: pwm8grp { |
| fsl,pins = < |
| MX6UL_PAD_CSI_HSYNC__PWM8_OUT 0x110b0 |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 |
| MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| MX6UL_PAD_NAND_DATA04__UART2_DCE_TX 0x1b0b1 |
| MX6UL_PAD_NAND_DATA05__UART2_DCE_RX 0x1b0b1 |
| MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS 0x1b0b1 |
| /* |
| * mux unused RTS to make sure it doesn't cause |
| * any interrupts when it is undefined |
| */ |
| MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart3: uart3grp { |
| fsl,pins = < |
| MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 |
| MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 |
| MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1 |
| MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart4: uart4grp { |
| fsl,pins = < |
| MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1 |
| MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_usbotg1: usbotg1 { |
| fsl,pins = < |
| MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_usdhc1: usdhc1grp { |
| fsl,pins = < |
| MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 |
| MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 |
| MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 |
| MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 |
| MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 |
| MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 |
| MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x100b1 /* SD1_CD */ |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059 |
| MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 |
| MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 |
| MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 |
| MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 |
| MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { |
| fsl,pins = < |
| MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 |
| MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 |
| MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 |
| MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 |
| MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 |
| MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 |
| >; |
| }; |
| |
| pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { |
| fsl,pins = < |
| MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 |
| MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 |
| MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 |
| MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 |
| MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 |
| MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 |
| >; |
| }; |
| |
| pinctrl_wdog: wdoggrp { |
| fsl,pins = < |
| MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0 |
| >; |
| }; |
| }; |
