# SPDX-License-Identifier: GPL-2.0-only
# Copyright (C) 2020 Renesas Electronics Corp.
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/renesas,vin.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas R-Car Video Input (VIN)

maintainers:
  - Niklas Söderlund <niklas.soderlund@ragnatech.se>

description:
  The R-Car Video Input (VIN) device provides video input capabilities for the
  Renesas R-Car family of devices.

  Each VIN instance has a single parallel input that supports RGB and YUV video,
  with both external synchronization and BT.656 synchronization for the latter.
  Depending on the instance the VIN input is connected to external SoC pins, or
  on Gen3 and RZ/G2 platforms to a CSI-2 receiver.

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - renesas,vin-r8a7742  # RZ/G1H
              - renesas,vin-r8a7743  # RZ/G1M
              - renesas,vin-r8a7744  # RZ/G1N
              - renesas,vin-r8a7745  # RZ/G1E
              - renesas,vin-r8a77470 # RZ/G1C
              - renesas,vin-r8a7790  # R-Car H2
              - renesas,vin-r8a7791  # R-Car M2-W
              - renesas,vin-r8a7792  # R-Car V2H
              - renesas,vin-r8a7793  # R-Car M2-N
              - renesas,vin-r8a7794  # R-Car E2
          - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1

      - items:
          - enum:
              - renesas,vin-r8a774a1 # RZ/G2M
              - renesas,vin-r8a774b1 # RZ/G2N
              - renesas,vin-r8a774c0 # RZ/G2E
              - renesas,vin-r8a774e1 # RZ/G2H
              - renesas,vin-r8a7778  # R-Car M1
              - renesas,vin-r8a7779  # R-Car H1
              - renesas,vin-r8a7795  # R-Car H3
              - renesas,vin-r8a7796  # R-Car M3-W
              - renesas,vin-r8a77965 # R-Car M3-N
              - renesas,vin-r8a77970 # R-Car V3M
              - renesas,vin-r8a77980 # R-Car V3H
              - renesas,vin-r8a77990 # R-Car E3
              - renesas,vin-r8a77995 # R-Car D3

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  power-domains:
    maxItems: 1

  resets:
    maxItems: 1

  #The per-board settings for Gen2 and RZ/G1 platforms:
  port:
    $ref: /schemas/graph.yaml#/$defs/port-base
    unevaluatedProperties: false
    description:
      A node containing a parallel input

    properties:
      endpoint:
        $ref: video-interfaces.yaml#
        unevaluatedProperties: false

        properties:
          hsync-active:
            description:
              If both HSYNC and VSYNC polarities are not specified, embedded
              synchronization is selected.
            default: 1

          vsync-active:
            description:
              If both HSYNC and VSYNC polarities are not specified, embedded
              synchronization is selected.
            default: 1

          field-active-even: true

          bus-width: true

          data-shift: true

          data-enable-active:
            description: Polarity of CLKENB signal
            default: 1

          pclk-sample: true

          data-active: true

  #The per-board settings for Gen3 and RZ/G2 platforms:
  renesas,id:
    description: VIN channel number
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 15

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Input port node, single endpoint describing a parallel input source.

        properties:
          endpoint:
            $ref: video-interfaces.yaml#
            unevaluatedProperties: false

            properties:
              hsync-active:
                description:
                  If both HSYNC and VSYNC polarities are not specified, embedded
                  synchronization is selected.
                default: 1

              vsync-active:
                description:
                  If both HSYNC and VSYNC polarities are not specified, embedded
                  synchronization is selected.
                default: 1

              field-active-even: true

              bus-width: true

              data-shift: true

              data-enable-active:
                description: Polarity of CLKENB signal
                default: 1

              pclk-sample: true

              data-active: true

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Input port node, multiple endpoints describing all the R-Car CSI-2
          modules connected the VIN.

        properties:
          endpoint@0:
            $ref: /schemas/graph.yaml#/properties/endpoint
            description: Endpoint connected to CSI20.

          endpoint@1:
            $ref: /schemas/graph.yaml#/properties/endpoint
            description: Endpoint connected to CSI21.

          endpoint@2:
            $ref: /schemas/graph.yaml#/properties/endpoint
            description: Endpoint connected to CSI40.

          endpoint@3:
            $ref: /schemas/graph.yaml#/properties/endpoint
            description: Endpoint connected to CSI41.

        anyOf:
          - required:
              - endpoint@0
          - required:
              - endpoint@1
          - required:
              - endpoint@2
          - required:
              - endpoint@3

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - power-domains
  - resets

if:
  properties:
    compatible:
      contains:
        enum:
          - renesas,vin-r8a7778
          - renesas,vin-r8a7779
          - renesas,rcar-gen2-vin
then:
  required:
    - port
else:
  required:
    - renesas,id
    - ports

additionalProperties: false

examples:
  # Device node example for Gen2 platform
  - |
    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/r8a7790-sysc.h>

    vin1: vin@e6ef1000 {
            compatible = "renesas,vin-r8a7790",
                         "renesas,rcar-gen2-vin";
            reg = <0xe6ef1000 0x1000>;
            interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&cpg CPG_MOD 810>;
            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
            resets = <&cpg 810>;

            port {
                    vin1ep0: endpoint {
                            remote-endpoint = <&adv7180>;
                            bus-width = <8>;
                    };
            };
    };

  # Device node example for Gen3 platform with only CSI-2
  - |
    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/r8a7795-sysc.h>

    vin0: video@e6ef0000 {
            compatible = "renesas,vin-r8a7795";
            reg = <0xe6ef0000 0x1000>;
            interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&cpg CPG_MOD 811>;
            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
            resets = <&cpg 811>;
            renesas,id = <0>;

            ports {
                    #address-cells = <1>;
                    #size-cells = <0>;

                    port@1 {
                            #address-cells = <1>;
                            #size-cells = <0>;

                            reg = <1>;

                            vin0csi20: endpoint@0 {
                                    reg = <0>;
                                    remote-endpoint= <&csi20vin0>;
                            };
                            vin0csi40: endpoint@2 {
                                    reg = <2>;
                                    remote-endpoint= <&csi40vin0>;
                            };
                    };
            };
    };

  # Device node example for Gen3 platform with CSI-2 and parallel
  - |
    #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/r8a77970-sysc.h>

    vin2: video@e6ef2000 {
            compatible = "renesas,vin-r8a77970";
            reg = <0xe6ef2000 0x1000>;
            interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&cpg CPG_MOD 809>;
            power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
            resets = <&cpg 809>;
            renesas,id = <2>;

            ports {
                    #address-cells = <1>;
                    #size-cells = <0>;

                    port@0 {
                            reg = <0>;

                            vin2_in: endpoint {
                                    remote-endpoint = <&adv7612_out>;
                                    hsync-active = <0>;
                                    vsync-active = <0>;
                            };
                    };

                    port@1 {
                            #address-cells = <1>;
                            #size-cells = <0>;

                            reg = <1>;

                            vin2csi40: endpoint@2 {
                                    reg = <2>;
                                    remote-endpoint = <&csi40vin2>;
                            };
                    };
            };
    };