blob: 2a33e71ba72b8535c43016727735e5ec4a0ad22f [file] [log] [blame]
Required properties:
- compatible: Should be "qca,<soc>-eth". Currently support compatibles are:
qca,ar7100-eth - Atheros AR7100
qca,ar7240-eth - Atheros AR7240
qca,ar7241-eth - Atheros AR7241
qca,ar7242-eth - Atheros AR7242
qca,ar9130-eth - Atheros AR9130
qca,ar9330-eth - Atheros AR9330
qca,ar9340-eth - Atheros AR9340
qca,qca9530-eth - Qualcomm Atheros QCA9530
qca,qca9550-eth - Qualcomm Atheros QCA9550
qca,qca9560-eth - Qualcomm Atheros QCA9560
- reg : Address and length of the register set for the device
- interrupts : Should contain eth interrupt
- phy-mode : See ethernet.txt file in the same directory
- clocks: the clock used by the core
- clock-names: the names of the clock listed in the clocks property. These are
"eth" and "mdio".
- resets: Should contain phandles to the reset signals
- reset-names: Should contain the names of reset signal listed in the resets
property. These are "mac" and "mdio"
Optional properties:
- phy-handle : phandle to the PHY device connected to this device.
- fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
Use instead of phy-handle.
Optional subnodes:
- mdio : specifies the mdio bus, used as a container for phy nodes
according to phy.txt in the same directory
ethernet@1a000000 {
compatible = "qca,ar9330-eth";
reg = <0x1a000000 0x200>;
interrupts = <5>;
resets = <&rst 13>, <&rst 23>;
reset-names = "mac", "mdio";
clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_MDIO>;
clock-names = "eth", "mdio";
phy-mode = "gmii";