Merge tag 'staging-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging driver updates from Greg KH:
"Here is the big set of staging driver patches for 6.0-rc1.
Another round where we removed more lines of code than added, always a
nice progression. Some of that came from the movement of the vme code
back into staging, and removal of some other of the vme driver code as
there are no known users and it is very obsolete and unmaintained. It
can be added back easily if someone offers to maintain it.
Other than that this merge has lots of little things:
- huge cleanups for r8188eu driver
- minor cleanups for other wifi drivers
- tiny loop fixes for greybus code
- other small coding style fixes
All of these have been in linux-next for a while with no reported
issues"
* tag 'staging-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (191 commits)
staging: r8188eu: fix potential uninitialised variable use in rtw_pwrctrl.c
staging: r8188eu: remove initializer from ret in rtw_pwr_wakeup
staging: vt6655: Convert macro vt6655_mac_clear_stck_ds to function
staging: vt6655: Rename MACvClearStckDS
staging: fbtft: core: set smem_len before fb_deferred_io_init call
staging: r8188eu: convert rtw_pwr_wakeup to correct error code semantics
staging: r8188eu: make dump_chip_info() static
staging: r8188eu: remove DoReserved prototype
staging: r8188eu: remove OnAtim prototype
staging: r8188eu: remove SetHwReg8188EU()
staging: r8188eu: make update_TSF() and correct_TSF() static
staging: r8188eu: remove unused parameter from update_TSF()
staging: r8188eu: remove unused parameter from correct_TSF()
staging: r8188eu: remove HW_VAR_SET_OPMODE from SetHwReg8188EU()
staging: pi433: remove duplicated comments
staging: qlge: refine variable name
staging: vt6655: Convert macro vt6655_mac_word_reg_bits_off to function
staging: vt6655: Convert macro vt6655_mac_reg_bits_off to function
staging: vt6655: Convert macro vt6655_mac_word_reg_bits_on to function
staging: vt6655: Convert macro vt6655_mac_reg_bits_on to function
...
diff --git a/Documentation/driver-api/vme.rst b/Documentation/driver-api/vme.rst
index def139c..c0b4753 100644
--- a/Documentation/driver-api/vme.rst
+++ b/Documentation/driver-api/vme.rst
@@ -290,8 +290,8 @@
VME API
-------
-.. kernel-doc:: include/linux/vme.h
+.. kernel-doc:: drivers/staging/vme_user/vme.h
:internal:
-.. kernel-doc:: drivers/vme/vme.c
+.. kernel-doc:: drivers/staging/vme_user/vme.c
:export:
diff --git a/MAINTAINERS b/MAINTAINERS
index 9635a29..79a10ba 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19261,6 +19261,7 @@
STAGING - REALTEK RTL8188EU DRIVERS
M: Larry Finger <Larry.Finger@lwfinger.net>
M: Phillip Potter <phil@philpotter.co.uk>
+R: Pavel Skripkin <paskripkin@gmail.com>
S: Supported
F: drivers/staging/r8188eu/
@@ -21580,12 +21581,10 @@
M: Manohar Vanga <manohar.vanga@gmail.com>
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
L: linux-kernel@vger.kernel.org
-S: Maintained
+S: Odd fixes
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git
F: Documentation/driver-api/vme.rst
F: drivers/staging/vme_user/
-F: drivers/vme/
-F: include/linux/vme*
VM SOCKETS (AF_VSOCK)
M: Stefano Garzarella <sgarzare@redhat.com>
diff --git a/drivers/Kconfig b/drivers/Kconfig
index b6a172d..19ee995 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -183,8 +183,6 @@
source "drivers/ntb/Kconfig"
-source "drivers/vme/Kconfig"
-
source "drivers/pwm/Kconfig"
source "drivers/irqchip/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 123dce2..0578572 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -165,7 +165,6 @@
obj-$(CONFIG_EXTCON) += extcon/
obj-$(CONFIG_MEMORY) += memory/
obj-$(CONFIG_IIO) += iio/
-obj-$(CONFIG_VME_BUS) += vme/
obj-$(CONFIG_IPACK_BUS) += ipack/
obj-$(CONFIG_NTB) += ntb/
obj-$(CONFIG_POWERCAP) += powercap/
diff --git a/drivers/staging/fbtft/fb_ssd1351.c b/drivers/staging/fbtft/fb_ssd1351.c
index 6fd549a..b8d55aa 100644
--- a/drivers/staging/fbtft/fb_ssd1351.c
+++ b/drivers/staging/fbtft/fb_ssd1351.c
@@ -196,8 +196,7 @@
"%s: power=%d, fb_blank=%d\n",
__func__, bd->props.power, bd->props.fb_blank);
- on = (bd->props.power == FB_BLANK_UNBLANK) &&
- (bd->props.fb_blank == FB_BLANK_UNBLANK);
+ on = !backlight_is_blank(bd);
/* Onboard backlight connected to GPIO0 on SSD1351, GPIO1 unused */
write_reg(par, 0xB5, on ? 0x03 : 0x02);
diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c
index 60b2278..afaba94 100644
--- a/drivers/staging/fbtft/fbtft-core.c
+++ b/drivers/staging/fbtft/fbtft-core.c
@@ -137,8 +137,7 @@
"%s: polarity=%d, power=%d, fb_blank=%d\n",
__func__, polarity, bd->props.power, bd->props.fb_blank);
- if ((bd->props.power == FB_BLANK_UNBLANK) &&
- (bd->props.fb_blank == FB_BLANK_UNBLANK))
+ if (!backlight_is_blank(bd))
gpiod_set_value(par->gpio.led[0], polarity);
else
gpiod_set_value(par->gpio.led[0], !polarity);
@@ -655,7 +654,6 @@
fbdefio->delay = HZ / fps;
fbdefio->sort_pagereflist = true;
fbdefio->deferred_io = fbtft_deferred_io;
- fb_deferred_io_init(info);
snprintf(info->fix.id, sizeof(info->fix.id), "%s", dev->driver->name);
info->fix.type = FB_TYPE_PACKED_PIXELS;
@@ -666,6 +664,7 @@
info->fix.line_length = width * bpp / 8;
info->fix.accel = FB_ACCEL_NONE;
info->fix.smem_len = vmem_size;
+ fb_deferred_io_init(info);
info->var.rotate = pdata->rotate;
info->var.xres = width;
diff --git a/drivers/staging/greybus/audio_helper.c b/drivers/staging/greybus/audio_helper.c
index 8437606..05e91e6 100644
--- a/drivers/staging/greybus/audio_helper.c
+++ b/drivers/staging/greybus/audio_helper.c
@@ -115,7 +115,7 @@
int num)
{
int i;
- struct snd_soc_dapm_widget *w, *next_w;
+ struct snd_soc_dapm_widget *w, *tmp_w;
#ifdef CONFIG_DEBUG_FS
struct dentry *parent = dapm->debugfs_dapm;
struct dentry *debugfs_w = NULL;
@@ -124,13 +124,13 @@
mutex_lock(&dapm->card->dapm_mutex);
for (i = 0; i < num; i++) {
/* below logic can be optimized to identify widget pointer */
- list_for_each_entry_safe(w, next_w, &dapm->card->widgets,
- list) {
- if (w->dapm != dapm)
- continue;
- if (!strcmp(w->name, widget->name))
+ w = NULL;
+ list_for_each_entry(tmp_w, &dapm->card->widgets, list) {
+ if (tmp_w->dapm == dapm &&
+ !strcmp(tmp_w->name, widget->name)) {
+ w = tmp_w;
break;
- w = NULL;
+ }
}
if (!w) {
dev_err(dapm->dev, "%s: widget not found\n",
diff --git a/drivers/staging/greybus/fw-management.c b/drivers/staging/greybus/fw-management.c
index 687c640..3342b84 100644
--- a/drivers/staging/greybus/fw-management.c
+++ b/drivers/staging/greybus/fw-management.c
@@ -102,7 +102,7 @@
}
static int fw_mgmt_interface_fw_version_operation(struct fw_mgmt *fw_mgmt,
- struct fw_mgmt_ioc_get_intf_version *fw_info)
+ struct fw_mgmt_ioc_get_intf_version *fw_info)
{
struct gb_connection *connection = fw_mgmt->connection;
struct gb_fw_mgmt_interface_fw_version_response response;
@@ -240,7 +240,7 @@
}
static int fw_mgmt_backend_fw_version_operation(struct fw_mgmt *fw_mgmt,
- struct fw_mgmt_ioc_get_backend_version *fw_info)
+ struct fw_mgmt_ioc_get_backend_version *fw_info)
{
struct gb_connection *connection = fw_mgmt->connection;
struct gb_fw_mgmt_backend_fw_version_request request;
@@ -473,7 +473,7 @@
return -EFAULT;
ret = fw_mgmt_backend_fw_update_operation(fw_mgmt,
- backend_update.firmware_tag);
+ backend_update.firmware_tag);
if (ret)
return ret;
diff --git a/drivers/staging/greybus/loopback.c b/drivers/staging/greybus/loopback.c
index 2471448..1a61fce 100644
--- a/drivers/staging/greybus/loopback.c
+++ b/drivers/staging/greybus/loopback.c
@@ -870,7 +870,7 @@
if (gb->send_count == gb->iteration_max) {
mutex_unlock(&gb->mutex);
- /* Wait for synchronous and asynchronus completion */
+ /* Wait for synchronous and asynchronous completion */
gb_loopback_async_wait_all(gb);
/* Mark complete unless user-space has poked us */
diff --git a/drivers/staging/octeon/ethernet-rx.c b/drivers/staging/octeon/ethernet-rx.c
index 9ebd665..965330e 100644
--- a/drivers/staging/octeon/ethernet-rx.c
+++ b/drivers/staging/octeon/ethernet-rx.c
@@ -469,8 +469,8 @@
if (!(pow_receive_groups & BIT(i)))
continue;
- netif_napi_add(dev_for_napi, &oct_rx_group[i].napi,
- cvm_oct_napi_poll, rx_napi_weight);
+ netif_napi_add_weight(dev_for_napi, &oct_rx_group[i].napi,
+ cvm_oct_napi_poll, rx_napi_weight);
napi_enable(&oct_rx_group[i].napi);
oct_rx_group[i].irq = OCTEON_IRQ_WORKQ0 + i;
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.c b/drivers/staging/olpc_dcon/olpc_dcon.c
index 7284cb4..9363c5c 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon.c
+++ b/drivers/staging/olpc_dcon/olpc_dcon.c
@@ -383,7 +383,7 @@
static void dcon_set_source_sync(struct dcon_priv *dcon, int arg)
{
dcon_set_source(dcon, arg);
- flush_scheduled_work();
+ flush_work(&dcon->switch_source);
}
static ssize_t dcon_mode_show(struct device *dev,
@@ -517,10 +517,7 @@
static int dcon_bl_update(struct backlight_device *dev)
{
struct dcon_priv *dcon = bl_get_data(dev);
- u8 level = dev->props.brightness & 0x0F;
-
- if (dev->props.power != FB_BLANK_UNBLANK)
- level = 0;
+ u8 level = backlight_get_brightness(dev) & 0x0F;
if (level != dcon->bl_val)
dcon_set_backlight(dcon, level);
diff --git a/drivers/staging/pi433/pi433_if.c b/drivers/staging/pi433/pi433_if.c
index 941aaa7..df02335 100644
--- a/drivers/staging/pi433/pi433_if.c
+++ b/drivers/staging/pi433/pi433_if.c
@@ -1406,7 +1406,7 @@
/*
* Claim device numbers. Then register a class
- * that will key udev/mdev to add/remove /dev nodes. Last, register
+ * that will key udev/mdev to add/remove /dev nodes.
* Last, register the driver which manages those device numbers.
*/
status = alloc_chrdev_region(&pi433_dev, 0, N_PI433_MINORS, "pi433");
diff --git a/drivers/staging/qlge/qlge_main.c b/drivers/staging/qlge/qlge_main.c
index 6cd7fc9..ca6b966 100644
--- a/drivers/staging/qlge/qlge_main.c
+++ b/drivers/staging/qlge/qlge_main.c
@@ -1976,7 +1976,7 @@
vlan_id);
} else {
/* Non-TCP/UDP large frames that span multiple buffers
- * can be processed corrrectly by the split frame logic.
+ * can be processed correctly by the split frame logic.
*/
qlge_process_mac_split_rx_intr(qdev, rx_ring, ib_mac_rsp,
vlan_id);
@@ -2955,7 +2955,7 @@
void __iomem *doorbell_area =
qdev->doorbell_area + (DB_PAGE_SIZE * (128 + rx_ring->cq_id));
int err = 0;
- u64 tmp;
+ u64 dma;
__le64 *base_indirect_ptr;
int page_entries;
@@ -3004,15 +3004,15 @@
FLAGS_LI; /* Load irq delay values */
if (rx_ring->cq_id < qdev->rss_ring_count) {
cqicb->flags |= FLAGS_LL; /* Load lbq values */
- tmp = (u64)rx_ring->lbq.base_dma;
+ dma = (u64)rx_ring->lbq.base_dma;
base_indirect_ptr = rx_ring->lbq.base_indirect;
- page_entries = 0;
- do {
- *base_indirect_ptr = cpu_to_le64(tmp);
- tmp += DB_PAGE_SIZE;
- base_indirect_ptr++;
- page_entries++;
- } while (page_entries < MAX_DB_PAGES_PER_BQ(QLGE_BQ_LEN));
+
+ for (page_entries = 0;
+ page_entries < MAX_DB_PAGES_PER_BQ(QLGE_BQ_LEN);
+ page_entries++) {
+ base_indirect_ptr[page_entries] = cpu_to_le64(dma);
+ dma += DB_PAGE_SIZE;
+ }
cqicb->lbq_addr = cpu_to_le64(rx_ring->lbq.base_indirect_dma);
cqicb->lbq_buf_size =
cpu_to_le16(QLGE_FIT16(qdev->lbq_buf_size));
@@ -3021,15 +3021,15 @@
rx_ring->lbq.next_to_clean = 0;
cqicb->flags |= FLAGS_LS; /* Load sbq values */
- tmp = (u64)rx_ring->sbq.base_dma;
+ dma = (u64)rx_ring->sbq.base_dma;
base_indirect_ptr = rx_ring->sbq.base_indirect;
- page_entries = 0;
- do {
- *base_indirect_ptr = cpu_to_le64(tmp);
- tmp += DB_PAGE_SIZE;
- base_indirect_ptr++;
- page_entries++;
- } while (page_entries < MAX_DB_PAGES_PER_BQ(QLGE_BQ_LEN));
+
+ for (page_entries = 0;
+ page_entries < MAX_DB_PAGES_PER_BQ(QLGE_BQ_LEN);
+ page_entries++) {
+ base_indirect_ptr[page_entries] = cpu_to_le64(dma);
+ dma += DB_PAGE_SIZE;
+ }
cqicb->sbq_addr =
cpu_to_le64(rx_ring->sbq.base_indirect_dma);
cqicb->sbq_buf_size = cpu_to_le16(SMALL_BUFFER_SIZE);
@@ -3041,8 +3041,8 @@
/* Inbound completion handling rx_rings run in
* separate NAPI contexts.
*/
- netif_napi_add(qdev->ndev, &rx_ring->napi, qlge_napi_poll_msix,
- 64);
+ netif_napi_add_weight(qdev->ndev, &rx_ring->napi,
+ qlge_napi_poll_msix, 64);
cqicb->irq_delay = cpu_to_le16(qdev->rx_coalesce_usecs);
cqicb->pkt_delay = cpu_to_le16(qdev->rx_max_coalesced_frames);
} else {
diff --git a/drivers/staging/r8188eu/Makefile b/drivers/staging/r8188eu/Makefile
index 1d7982b..eea16eb 100644
--- a/drivers/staging/r8188eu/Makefile
+++ b/drivers/staging/r8188eu/Makefile
@@ -5,7 +5,6 @@
hal/HalHWImg8188E_RF.o \
hal/HalPhyRf_8188e.o \
hal/HalPwrSeqCmd.o \
- hal/Hal8188EPwrSeq.o \
hal/Hal8188ERateAdaptive.o \
hal/hal_intf.o \
hal/hal_com.o \
diff --git a/drivers/staging/r8188eu/core/rtw_ap.c b/drivers/staging/r8188eu/core/rtw_ap.c
index ac6effb..5bd9dfa 100644
--- a/drivers/staging/r8188eu/core/rtw_ap.c
+++ b/drivers/staging/r8188eu/core/rtw_ap.c
@@ -654,18 +654,17 @@
set_tx_beacon_cmd(padapter);
}
-/*
-op_mode
-Set to 0 (HT pure) under the following conditions
- - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or
- - all STAs in the BSS are 20 MHz HT in 20 MHz BSS
-Set to 1 (HT non-member protection) if there may be non-HT STAs
- in both the primary and the secondary channel
-Set to 2 if only HT STAs are associated in BSS,
- however and at least one 20 MHz HT STA is associated
-Set to 3 (HT mixed mode) when one or more non-HT STAs are associated
- (currently non-GF HT station is considered as non-HT STA also)
-*/
+/* op_mode
+ * Set to 0 (HT pure) under the following conditions
+ * - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or
+ * - all STAs in the BSS are 20 MHz HT in 20 MHz BSS
+ * Set to 1 (HT non-member protection) if there may be non-HT STAs
+ * in both the primary and the secondary channel
+ * Set to 2 if only HT STAs are associated in BSS,
+ * however and at least one 20 MHz HT STA is associated
+ * Set to 3 (HT mixed mode) when one or more non-HT STAs are associated
+ * (currently non-GF HT station is considered as non-HT STA also)
+ */
static int rtw_ht_operation_update(struct adapter *padapter)
{
u16 cur_op_mode, new_op_mode;
diff --git a/drivers/staging/r8188eu/core/rtw_cmd.c b/drivers/staging/r8188eu/core/rtw_cmd.c
index 06523d9..5b6a891 100644
--- a/drivers/staging/r8188eu/core/rtw_cmd.c
+++ b/drivers/staging/r8188eu/core/rtw_cmd.c
@@ -898,8 +898,12 @@
static void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
{
u32 txdma_status;
+ int res;
- txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
+ res = rtw_read32(padapter, REG_TXDMA_STATUS, &txdma_status);
+ if (res)
+ return;
+
if (txdma_status != 0x00)
rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status);
/* total xmit irp = 4 */
@@ -1177,7 +1181,14 @@
static bool rtw_is_hi_queue_empty(struct adapter *adapter)
{
- return (rtw_read32(adapter, REG_HGQ_INFORMATION) & 0x0000ff00) == 0;
+ int res;
+ u32 reg;
+
+ res = rtw_read32(adapter, REG_HGQ_INFORMATION, ®);
+ if (res)
+ return false;
+
+ return (reg & 0x0000ff00) == 0;
}
static void rtw_chk_hi_queue_hdl(struct adapter *padapter)
diff --git a/drivers/staging/r8188eu/core/rtw_efuse.c b/drivers/staging/r8188eu/core/rtw_efuse.c
index 0e0e606..df9534d 100644
--- a/drivers/staging/r8188eu/core/rtw_efuse.c
+++ b/drivers/staging/r8188eu/core/rtw_efuse.c
@@ -28,22 +28,35 @@
u32 value32;
u8 readbyte;
u16 retry;
+ int res;
/* Write Address */
rtw_write8(Adapter, EFUSE_CTRL + 1, (_offset & 0xff));
- readbyte = rtw_read8(Adapter, EFUSE_CTRL + 2);
+ res = rtw_read8(Adapter, EFUSE_CTRL + 2, &readbyte);
+ if (res)
+ return;
+
rtw_write8(Adapter, EFUSE_CTRL + 2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
/* Write bit 32 0 */
- readbyte = rtw_read8(Adapter, EFUSE_CTRL + 3);
+ res = rtw_read8(Adapter, EFUSE_CTRL + 3, &readbyte);
+ if (res)
+ return;
+
rtw_write8(Adapter, EFUSE_CTRL + 3, (readbyte & 0x7f));
/* Check bit 32 read-ready */
- retry = 0;
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
- while (!(((value32 >> 24) & 0xff) & 0x80) && (retry < 10000)) {
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
- retry++;
+ res = rtw_read32(Adapter, EFUSE_CTRL, &value32);
+ if (res)
+ return;
+
+ for (retry = 0; retry < 10000; retry++) {
+ res = rtw_read32(Adapter, EFUSE_CTRL, &value32);
+ if (res)
+ continue;
+
+ if (((value32 >> 24) & 0xff) & 0x80)
+ break;
}
/* 20100205 Joseph: Add delay suggested by SD1 Victor. */
@@ -51,37 +64,11 @@
/* Designer says that there shall be some delay after ready bit is set, or the */
/* result will always stay on last data we read. */
udelay(50);
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
+ res = rtw_read32(Adapter, EFUSE_CTRL, &value32);
+ if (res)
+ return;
*pbuf = (u8)(value32 & 0xff);
-}
-/*-----------------------------------------------------------------------------
- * Function: EFUSE_ShadowMapUpdate
- *
- * Overview: Transfer current EFUSE content to shadow init and modify map.
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/13/2008 MHC Create Version 0.
- *
- *---------------------------------------------------------------------------*/
-void EFUSE_ShadowMapUpdate(struct adapter *pAdapter)
-{
- struct eeprom_priv *pEEPROM = &pAdapter->eeprompriv;
-
- if (pEEPROM->bautoload_fail_flag) {
- memset(pEEPROM->efuse_eeprom_data, 0xFF, EFUSE_MAP_LEN_88E);
- return;
- }
-
- rtl8188e_EfusePowerSwitch(pAdapter, true);
- rtl8188e_ReadEFuse(pAdapter, 0, EFUSE_MAP_LEN_88E, pEEPROM->efuse_eeprom_data);
- rtl8188e_EfusePowerSwitch(pAdapter, false);
+ /* FIXME: return an error to caller */
}
diff --git a/drivers/staging/r8188eu/core/rtw_fw.c b/drivers/staging/r8188eu/core/rtw_fw.c
index 0451e51..95534f9 100644
--- a/drivers/staging/r8188eu/core/rtw_fw.c
+++ b/drivers/staging/r8188eu/core/rtw_fw.c
@@ -44,18 +44,28 @@
static void fw_download_enable(struct adapter *padapter, bool enable)
{
u8 tmp;
+ int res;
if (enable) {
/* MCU firmware download enable. */
- tmp = rtw_read8(padapter, REG_MCUFWDL);
+ res = rtw_read8(padapter, REG_MCUFWDL, &tmp);
+ if (res)
+ return;
+
rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
/* 8051 reset */
- tmp = rtw_read8(padapter, REG_MCUFWDL + 2);
+ res = rtw_read8(padapter, REG_MCUFWDL + 2, &tmp);
+ if (res)
+ return;
+
rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7);
} else {
/* MCU firmware download disable. */
- tmp = rtw_read8(padapter, REG_MCUFWDL);
+ res = rtw_read8(padapter, REG_MCUFWDL, &tmp);
+ if (res)
+ return;
+
rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe);
/* Reserved for fw extension. */
@@ -125,8 +135,13 @@
{
u8 value8;
u8 u8Page = (u8)(page & 0x07);
+ int res;
- value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
+ res = rtw_read8(padapter, REG_MCUFWDL + 2, &value8);
+ if (res)
+ return _FAIL;
+
+ value8 = (value8 & 0xF8) | u8Page;
rtw_write8(padapter, REG_MCUFWDL + 2, value8);
return block_write(padapter, buffer, size);
@@ -165,8 +180,12 @@
void rtw_reset_8051(struct adapter *padapter)
{
u8 val8;
+ int res;
- val8 = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
+ res = rtw_read8(padapter, REG_SYS_FUNC_EN + 1, &val8);
+ if (res)
+ return;
+
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val8 & (~BIT(2)));
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val8 | (BIT(2)));
}
@@ -175,10 +194,14 @@
{
u32 counter = 0;
u32 value32;
+ int res;
/* polling CheckSum report */
do {
- value32 = rtw_read32(padapter, REG_MCUFWDL);
+ res = rtw_read32(padapter, REG_MCUFWDL, &value32);
+ if (res)
+ continue;
+
if (value32 & FWDL_CHKSUM_RPT)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
@@ -186,7 +209,10 @@
if (counter >= POLLING_READY_TIMEOUT_COUNT)
return _FAIL;
- value32 = rtw_read32(padapter, REG_MCUFWDL);
+ res = rtw_read32(padapter, REG_MCUFWDL, &value32);
+ if (res)
+ return _FAIL;
+
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
rtw_write32(padapter, REG_MCUFWDL, value32);
@@ -196,9 +222,10 @@
/* polling for FW ready */
counter = 0;
do {
- value32 = rtw_read32(padapter, REG_MCUFWDL);
- if (value32 & WINTINI_RDY)
+ res = rtw_read32(padapter, REG_MCUFWDL, &value32);
+ if (!res && value32 & WINTINI_RDY)
return _SUCCESS;
+
udelay(5);
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
@@ -239,7 +266,7 @@
int rtl8188e_firmware_download(struct adapter *padapter)
{
int ret = _SUCCESS;
- u8 write_fw_retry = 0;
+ u8 reg;
unsigned long fwdl_timeout;
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct device *device = dvobj_to_dev(dvobj);
@@ -259,9 +286,9 @@
fwhdr = (struct rt_firmware_hdr *)dvobj->firmware.data;
if (IS_FW_HEADER_EXIST(fwhdr)) {
- pr_info_once("R8188EU: Firmware Version %d, SubVersion %d, Signature 0x%x\n",
- le16_to_cpu(fwhdr->version), fwhdr->subversion,
- le16_to_cpu(fwhdr->signature));
+ dev_info_once(device, "Firmware Version %d, SubVersion %d, Signature 0x%x\n",
+ le16_to_cpu(fwhdr->version), fwhdr->subversion,
+ le16_to_cpu(fwhdr->signature));
fw_data = fw_data + sizeof(struct rt_firmware_hdr);
fw_size = fw_size - sizeof(struct rt_firmware_hdr);
@@ -269,23 +296,34 @@
/* Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */
/* or it will cause download Fw fail. 2010.02.01. by tynli. */
- if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
+ ret = rtw_read8(padapter, REG_MCUFWDL, ®);
+ if (ret) {
+ ret = _FAIL;
+ goto exit;
+ }
+
+ if (reg & RAM_DL_SEL) { /* 8051 RAM code */
rtw_write8(padapter, REG_MCUFWDL, 0x00);
rtw_reset_8051(padapter);
}
fw_download_enable(padapter, true);
fwdl_timeout = jiffies + msecs_to_jiffies(500);
- while (1) {
+ do {
/* reset the FWDL chksum */
- rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_CHKSUM_RPT);
+ ret = rtw_read8(padapter, REG_MCUFWDL, ®);
+ if (ret) {
+ ret = _FAIL;
+ continue;
+ }
+
+ rtw_write8(padapter, REG_MCUFWDL, reg | FWDL_CHKSUM_RPT);
ret = write_fw(padapter, fw_data, fw_size);
-
- if (ret == _SUCCESS ||
- (time_after(jiffies, fwdl_timeout) && write_fw_retry++ >= 3))
+ if (ret == _SUCCESS)
break;
- }
+ } while (!time_after(jiffies, fwdl_timeout));
+
fw_download_enable(padapter, false);
if (ret != _SUCCESS)
goto exit;
diff --git a/drivers/staging/r8188eu/core/rtw_ieee80211.c b/drivers/staging/r8188eu/core/rtw_ieee80211.c
index 385a9ed..bc8543e 100644
--- a/drivers/staging/r8188eu/core/rtw_ieee80211.c
+++ b/drivers/staging/r8188eu/core/rtw_ieee80211.c
@@ -1048,6 +1048,7 @@
unsigned char *pbuf;
int group_cipher = 0, pairwise_cipher = 0, is8021x = 0;
int ret = _FAIL;
+
pbuf = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength - 12);
if (pbuf && (wpa_ielen > 0)) {
diff --git a/drivers/staging/r8188eu/core/rtw_ioctl_set.c b/drivers/staging/r8188eu/core/rtw_ioctl_set.c
index 7ba75f7..17f6bcb 100644
--- a/drivers/staging/r8188eu/core/rtw_ioctl_set.c
+++ b/drivers/staging/r8188eu/core/rtw_ioctl_set.c
@@ -71,7 +71,6 @@
pibss = padapter->registrypriv.dev_network.MacAddress;
- memset(&pdev_network->Ssid, 0, sizeof(struct ndis_802_11_ssid));
memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid));
rtw_update_registrypriv_dev_network(padapter);
diff --git a/drivers/staging/r8188eu/core/rtw_iol.c b/drivers/staging/r8188eu/core/rtw_iol.c
index af8e84a..31e196c 100644
--- a/drivers/staging/r8188eu/core/rtw_iol.c
+++ b/drivers/staging/r8188eu/core/rtw_iol.c
@@ -67,7 +67,7 @@
return false;
}
-int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask)
+int rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WB_REG, 0x0, 0x0, 0x0};
@@ -81,7 +81,7 @@
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
-int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask)
+int rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WW_REG, 0x0, 0x0, 0x0};
@@ -95,7 +95,7 @@
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
-int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask)
+int rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WD_REG, 0x0, 0x0, 0x0};
@@ -109,7 +109,7 @@
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
-int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask)
+int rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_W_RF, 0x0, 0x0, 0x0};
diff --git a/drivers/staging/r8188eu/core/rtw_led.c b/drivers/staging/r8188eu/core/rtw_led.c
index 2f30004..d5c6c5e 100644
--- a/drivers/staging/r8188eu/core/rtw_led.c
+++ b/drivers/staging/r8188eu/core/rtw_led.c
@@ -16,7 +16,7 @@
(l)->CurrLedState == LED_BLINK_WPS_STOP || \
(l)->bLedWPSBlinkInProgress)
-static void ResetLedStatus(struct LED_871x *pLed)
+static void ResetLedStatus(struct led_priv *pLed)
{
pLed->CurrLedState = RTW_LED_OFF; /* Current LED state. */
pLed->bLedOn = false; /* true if LED is ON, false if LED is OFF. */
@@ -32,30 +32,40 @@
pLed->bLedScanBlinkInProgress = false;
}
-static void SwLedOn(struct adapter *padapter, struct LED_871x *pLed)
+static void SwLedOn(struct adapter *padapter, struct led_priv *pLed)
{
u8 LedCfg;
+ int res;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
- LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+ res = rtw_read8(padapter, REG_LEDCFG2, &LedCfg);
+ if (res)
+ return;
+
rtw_write8(padapter, REG_LEDCFG2, (LedCfg & 0xf0) | BIT(5) | BIT(6)); /* SW control led0 on. */
pLed->bLedOn = true;
}
-static void SwLedOff(struct adapter *padapter, struct LED_871x *pLed)
+static void SwLedOff(struct adapter *padapter, struct led_priv *pLed)
{
u8 LedCfg;
+ int res;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
goto exit;
- LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */
+ res = rtw_read8(padapter, REG_LEDCFG2, &LedCfg);/* 0x4E */
+ if (res)
+ goto exit;
LedCfg &= 0x90; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT(3)));
- LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
+ res = rtw_read8(padapter, REG_MAC_PINMUX_CFG, &LedCfg);
+ if (res)
+ goto exit;
+
LedCfg &= 0xFE;
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
exit:
@@ -65,7 +75,7 @@
static void blink_work(struct work_struct *work)
{
struct delayed_work *dwork = to_delayed_work(work);
- struct LED_871x *pLed = container_of(dwork, struct LED_871x, blink_work);
+ struct led_priv *pLed = container_of(dwork, struct led_priv, blink_work);
struct adapter *padapter = pLed->padapter;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
@@ -172,35 +182,32 @@
void rtl8188eu_InitSwLeds(struct adapter *padapter)
{
struct led_priv *pledpriv = &padapter->ledpriv;
- struct LED_871x *pLed = &pledpriv->SwLed0;
- pLed->padapter = padapter;
- ResetLedStatus(pLed);
- INIT_DELAYED_WORK(&pLed->blink_work, blink_work);
+ pledpriv->padapter = padapter;
+ ResetLedStatus(pledpriv);
+ INIT_DELAYED_WORK(&pledpriv->blink_work, blink_work);
}
void rtl8188eu_DeInitSwLeds(struct adapter *padapter)
{
struct led_priv *ledpriv = &padapter->ledpriv;
- struct LED_871x *pLed = &ledpriv->SwLed0;
- cancel_delayed_work_sync(&pLed->blink_work);
- ResetLedStatus(pLed);
- SwLedOff(padapter, pLed);
+ cancel_delayed_work_sync(&ledpriv->blink_work);
+ ResetLedStatus(ledpriv);
+ SwLedOff(padapter, ledpriv);
}
void rtw_led_control(struct adapter *padapter, enum LED_CTL_MODE LedAction)
{
- struct led_priv *ledpriv = &padapter->ledpriv;
+ struct led_priv *pLed = &padapter->ledpriv;
struct registry_priv *registry_par;
- struct LED_871x *pLed = &ledpriv->SwLed0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped) ||
(!padapter->hw_init_completed))
return;
- if (!ledpriv->bRegUseLed)
+ if (!pLed->bRegUseLed)
return;
registry_par = &padapter->registrypriv;
diff --git a/drivers/staging/r8188eu/core/rtw_mlme.c b/drivers/staging/r8188eu/core/rtw_mlme.c
index 5a81564..2705c9d 100644
--- a/drivers/staging/r8188eu/core/rtw_mlme.c
+++ b/drivers/staging/r8188eu/core/rtw_mlme.c
@@ -676,7 +676,6 @@
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
- memset(&pdev_network->Ssid, 0, sizeof(struct ndis_802_11_ssid));
memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid));
rtw_update_registrypriv_dev_network(adapter);
@@ -1118,7 +1117,7 @@
/* MACID|OPMODE:1 connect */
media_status_rpt = (u16)((psta->mac_id << 8) | mstatus);
- SetHwReg8188EU(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status_rpt);
+ rtl8188e_set_FwMediaStatus_cmd(adapter, media_status_rpt);
}
void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf)
@@ -1196,7 +1195,7 @@
u16 media_status;
media_status = (mac_id << 8) | 0; /* MACID|OPMODE:0 means disconnect */
/* for STA, AP, ADHOC mode, report disconnect stauts to FW */
- SetHwReg8188EU(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status);
+ rtl8188e_set_FwMediaStatus_cmd(adapter, media_status);
}
if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
@@ -1253,7 +1252,6 @@
memcpy(pdev_network, &tgt_network->network, get_wlan_bssid_ex_sz(&tgt_network->network));
- memset(&pdev_network->Ssid, 0, sizeof(struct ndis_802_11_ssid));
memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid));
rtw_update_registrypriv_dev_network(adapter);
diff --git a/drivers/staging/r8188eu/core/rtw_mlme_ext.c b/drivers/staging/r8188eu/core/rtw_mlme_ext.c
index faf23fc..32d0e10 100644
--- a/drivers/staging/r8188eu/core/rtw_mlme_ext.c
+++ b/drivers/staging/r8188eu/core/rtw_mlme_ext.c
@@ -428,6 +428,58 @@
return _SUCCESS;
}
+static void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe)
+{
+ u8 *pIE;
+ __le32 *pbuf;
+
+ pIE = pframe + sizeof(struct ieee80211_hdr_3addr);
+ pbuf = (__le32 *)pIE;
+
+ pmlmeext->TSFValue = le32_to_cpu(*(pbuf + 1));
+
+ pmlmeext->TSFValue = pmlmeext->TSFValue << 32;
+
+ pmlmeext->TSFValue |= le32_to_cpu(*pbuf);
+}
+
+static void correct_TSF(struct adapter *padapter)
+{
+ u8 reg;
+ int res;
+ u64 tsf;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+
+ tsf = pmlmeext->TSFValue - do_div(pmlmeext->TSFValue,
+ pmlmeinfo->bcn_interval * 1024) - 1024; /* us */
+
+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) ||
+ ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
+ rtw_stop_tx_beacon(padapter);
+
+ /* disable related TSF function */
+ res = rtw_read8(padapter, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(padapter, REG_BCN_CTRL, reg & (~BIT(3)));
+
+ rtw_write32(padapter, REG_TSFTR, tsf);
+ rtw_write32(padapter, REG_TSFTR + 4, tsf >> 32);
+
+ /* enable related TSF function */
+ res = rtw_read8(padapter, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(padapter, REG_BCN_CTRL, reg | BIT(3));
+
+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) ||
+ ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
+ rtw_resume_tx_beacon(padapter);
+}
+
/****************************************************************************
Following are the callback functions for each subtype of the management frames
@@ -582,7 +634,7 @@
pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pframe + sizeof(struct ieee80211_hdr_3addr), len - sizeof(struct ieee80211_hdr_3addr));
/* update TSF Value */
- update_TSF(pmlmeext, pframe, len);
+ update_TSF(pmlmeext, pframe);
/* start auth */
start_clnt_auth(padapter);
@@ -625,7 +677,7 @@
}
/* update TSF Value */
- update_TSF(pmlmeext, pframe, len);
+ update_TSF(pmlmeext, pframe);
/* report sta add event */
report_add_sta_event(padapter, GetAddr2Ptr(pframe), cam_idx);
@@ -5363,26 +5415,20 @@
return ret;
}
-void issue_action_BA(struct adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status)
+void issue_action_BA(struct adapter *padapter, unsigned char *raddr, u8 action, u16 status)
{
- u8 category = WLAN_CATEGORY_BACK;
u16 start_seq;
- u16 BA_para_set;
- u16 reason_code;
- u16 BA_timeout_value;
- __le16 le_tmp;
u16 BA_starting_seqctrl = 0;
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
- u8 *pframe;
- struct ieee80211_hdr *pwlanhdr;
- __le16 *fctrl;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct sta_info *psta;
struct sta_priv *pstapriv = &padapter->stapriv;
struct registry_priv *pregpriv = &padapter->registrypriv;
+ struct ieee80211_mgmt *mgmt;
+ u16 capab, params;
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (!pmgntframe)
@@ -5394,81 +5440,70 @@
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)(pmgntframe->buf_addr + TXDESC_OFFSET);
- fctrl = &pwlanhdr->frame_control;
- *(fctrl) = 0;
+ mgmt->frame_control = cpu_to_le16(IEEE80211_STYPE_ACTION | IEEE80211_FTYPE_MGMT);
- /* memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); */
- memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
- memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN);
- memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
+ memcpy(mgmt->da, raddr, ETH_ALEN);
+ memcpy(mgmt->sa, myid(&padapter->eeprompriv), ETH_ALEN);
+ memcpy(mgmt->bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
- SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+ mgmt->seq_ctrl = cpu_to_le16(pmlmeext->mgnt_seq);
pmlmeext->mgnt_seq++;
- SetFrameSubType(pframe, WIFI_ACTION);
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+ mgmt->u.action.category = WLAN_CATEGORY_BACK;
- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &pattrib->pktlen);
- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &pattrib->pktlen);
+ switch (action) {
+ case WLAN_ACTION_ADDBA_REQ:
+ mgmt->u.action.u.addba_req.action_code = WLAN_ACTION_ADDBA_REQ;
+ do {
+ pmlmeinfo->dialogToken++;
+ } while (pmlmeinfo->dialogToken == 0);
+ mgmt->u.action.u.addba_req.dialog_token = pmlmeinfo->dialogToken;
- if (category == 3) {
- switch (action) {
- case 0: /* ADDBA req */
- do {
- pmlmeinfo->dialogToken++;
- } while (pmlmeinfo->dialogToken == 0);
- pframe = rtw_set_fixed_ie(pframe, 1, &pmlmeinfo->dialogToken, &pattrib->pktlen);
+ /* immediate ack & 64 buffer size */
+ capab = u16_encode_bits(64, IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK);
+ capab |= u16_encode_bits(1, IEEE80211_ADDBA_PARAM_POLICY_MASK);
+ capab |= u16_encode_bits(status, IEEE80211_ADDBA_PARAM_TID_MASK);
+ mgmt->u.action.u.addba_req.capab = cpu_to_le16(capab);
- BA_para_set = (0x1002 | ((status & 0xf) << 2)); /* immediate ack & 64 buffer size */
- le_tmp = cpu_to_le16(BA_para_set);
- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&le_tmp, &pattrib->pktlen);
+ mgmt->u.action.u.addba_req.timeout = cpu_to_le16(5000); /* 5 ms */
- BA_timeout_value = 5000;/* 5ms */
- le_tmp = cpu_to_le16(BA_timeout_value);
- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&le_tmp, &pattrib->pktlen);
+ psta = rtw_get_stainfo(pstapriv, raddr);
+ if (psta) {
+ start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07] & 0xfff) + 1;
- psta = rtw_get_stainfo(pstapriv, raddr);
- if (psta) {
- start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07] & 0xfff) + 1;
+ psta->BA_starting_seqctrl[status & 0x07] = start_seq;
- psta->BA_starting_seqctrl[status & 0x07] = start_seq;
-
- BA_starting_seqctrl = start_seq << 4;
- }
- le_tmp = cpu_to_le16(BA_starting_seqctrl);
- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&le_tmp, &pattrib->pktlen);
- break;
- case 1: /* ADDBA rsp */
- pframe = rtw_set_fixed_ie(pframe, 1, &pmlmeinfo->ADDBA_req.dialog_token, &pattrib->pktlen);
- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&status, &pattrib->pktlen);
- BA_para_set = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f;
- BA_para_set |= 0x1000; /* 64 buffer size */
-
- if (pregpriv->ampdu_amsdu == 0)/* disabled */
- BA_para_set = BA_para_set & ~BIT(0);
- else if (pregpriv->ampdu_amsdu == 1)/* enabled */
- BA_para_set = BA_para_set | BIT(0);
- le_tmp = cpu_to_le16(BA_para_set);
-
- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&le_tmp, &pattrib->pktlen);
- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&pmlmeinfo->ADDBA_req.BA_timeout_value, &pattrib->pktlen);
- break;
- case 2:/* DELBA */
- BA_para_set = (status & 0x1F) << 3;
- le_tmp = cpu_to_le16(BA_para_set);
- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&le_tmp, &pattrib->pktlen);
-
- reason_code = 37;/* Requested from peer STA as it does not want to use the mechanism */
- le_tmp = cpu_to_le16(reason_code);
- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&le_tmp, &pattrib->pktlen);
- break;
- default:
- break;
+ BA_starting_seqctrl = start_seq << 4;
}
+ mgmt->u.action.u.addba_req.start_seq_num = cpu_to_le16(BA_starting_seqctrl);
+
+ pattrib->pktlen = offsetofend(struct ieee80211_mgmt,
+ u.action.u.addba_req.start_seq_num);
+ break;
+ case WLAN_ACTION_ADDBA_RESP:
+ mgmt->u.action.u.addba_resp.action_code = WLAN_ACTION_ADDBA_RESP;
+ mgmt->u.action.u.addba_resp.dialog_token = pmlmeinfo->ADDBA_req.dialog_token;
+ mgmt->u.action.u.addba_resp.status = cpu_to_le16(status);
+ capab = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f;
+ capab |= u16_encode_bits(64, IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK);
+ capab |= u16_encode_bits(pregpriv->ampdu_amsdu, IEEE80211_ADDBA_PARAM_AMSDU_MASK);
+ mgmt->u.action.u.addba_req.capab = cpu_to_le16(capab);
+ mgmt->u.action.u.addba_resp.timeout = pmlmeinfo->ADDBA_req.BA_timeout_value;
+ pattrib->pktlen = offsetofend(struct ieee80211_mgmt, u.action.u.addba_resp.timeout);
+ break;
+ case WLAN_ACTION_DELBA:
+ mgmt->u.action.u.delba.action_code = WLAN_ACTION_DELBA;
+ mgmt->u.action.u.delba.params = cpu_to_le16((status & 0x1F) << 3);
+ params = u16_encode_bits((status & 0x1), IEEE80211_DELBA_PARAM_INITIATOR_MASK);
+ params |= u16_encode_bits((status >> 1) & 0xF, IEEE80211_DELBA_PARAM_TID_MASK);
+ mgmt->u.action.u.delba.params = cpu_to_le16(params);
+ mgmt->u.action.u.delba.reason_code = cpu_to_le16(WLAN_STATUS_REQUEST_DECLINED);
+ pattrib->pktlen = offsetofend(struct ieee80211_mgmt, u.action.u.delba.reason_code);
+ break;
+ default:
+ break;
}
pattrib->last_txcmdsz = pattrib->pktlen;
@@ -5623,7 +5658,7 @@
if (initiator == 0) { /* recipient */
for (tid = 0; tid < MAXTID; tid++) {
if (psta->recvreorder_ctrl[tid].enable) {
- issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid << 1) | initiator) & 0x1F));
+ issue_action_BA(padapter, addr, WLAN_ACTION_DELBA, (((tid << 1) | initiator) & 0x1F));
psta->recvreorder_ctrl[tid].enable = false;
psta->recvreorder_ctrl[tid].indicate_seq = 0xffff;
}
@@ -5631,7 +5666,7 @@
} else if (initiator == 1) { /* originator */
for (tid = 0; tid < MAXTID; tid++) {
if (psta->htpriv.agg_enable_bitmap & BIT(tid)) {
- issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid << 1) | initiator) & 0x1F));
+ issue_action_BA(padapter, addr, WLAN_ACTION_DELBA, (((tid << 1) | initiator) & 0x1F));
psta->htpriv.agg_enable_bitmap &= ~BIT(tid);
psta->htpriv.candidate_tid_bitmap &= ~BIT(tid);
}
@@ -5667,14 +5702,129 @@
bool get_beacon_valid_bit(struct adapter *adapter)
{
+ int res;
+ u8 reg;
+
+ res = rtw_read8(adapter, REG_TDECTRL + 2, ®);
+ if (res)
+ return false;
+
/* BIT(16) of REG_TDECTRL = BIT(0) of REG_TDECTRL+2 */
- return BIT(0) & rtw_read8(adapter, REG_TDECTRL + 2);
+ return BIT(0) & reg;
}
void clear_beacon_valid_bit(struct adapter *adapter)
{
+ int res;
+ u8 reg;
+
+ res = rtw_read8(adapter, REG_TDECTRL + 2, ®);
+ if (res)
+ return;
+
/* BIT(16) of REG_TDECTRL = BIT(0) of REG_TDECTRL+2, write 1 to clear, Clear by sw */
- rtw_write8(adapter, REG_TDECTRL + 2, rtw_read8(adapter, REG_TDECTRL + 2) | BIT(0));
+ rtw_write8(adapter, REG_TDECTRL + 2, reg | BIT(0));
+}
+
+void rtw_resume_tx_beacon(struct adapter *adapt)
+{
+ struct hal_data_8188e *haldata = &adapt->haldata;
+
+ /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
+ /* which should be read from register to a global variable. */
+
+ rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) | BIT(6));
+ haldata->RegFwHwTxQCtrl |= BIT(6);
+ rtw_write8(adapt, REG_TBTT_PROHIBIT + 1, 0xff);
+ haldata->RegReg542 |= BIT(0);
+ rtw_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
+}
+
+void rtw_stop_tx_beacon(struct adapter *adapt)
+{
+ struct hal_data_8188e *haldata = &adapt->haldata;
+
+ /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
+ /* which should be read from register to a global variable. */
+
+ rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
+ haldata->RegFwHwTxQCtrl &= (~BIT(6));
+ rtw_write8(adapt, REG_TBTT_PROHIBIT + 1, 0x64);
+ haldata->RegReg542 &= ~(BIT(0));
+ rtw_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
+
+ /* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */
+}
+
+static void rtw_set_opmode(struct adapter *adapter, u8 mode)
+{
+ u8 val8;
+ int res;
+
+ /* disable Port0 TSF update */
+ res = rtw_read8(adapter, REG_BCN_CTRL, &val8);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_BCN_CTRL, val8 | BIT(4));
+
+ /* set net_type */
+ res = rtw_read8(adapter, MSR, &val8);
+ if (res)
+ return;
+
+ val8 &= 0x0c;
+ val8 |= mode;
+ rtw_write8(adapter, MSR, val8);
+
+ if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
+ rtw_stop_tx_beacon(adapter);
+
+ rtw_write8(adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
+ } else if (mode == _HW_STATE_ADHOC_) {
+ rtw_resume_tx_beacon(adapter);
+ rtw_write8(adapter, REG_BCN_CTRL, 0x1a);
+ } else if (mode == _HW_STATE_AP_) {
+ rtw_resume_tx_beacon(adapter);
+
+ rtw_write8(adapter, REG_BCN_CTRL, 0x12);
+
+ /* Set RCR */
+ rtw_write32(adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
+ /* enable to rx data frame */
+ rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF);
+ /* enable to rx ps-poll */
+ rtw_write16(adapter, REG_RXFLTMAP1, 0x0400);
+
+ /* Beacon Control related register for first time */
+ rtw_write8(adapter, REG_BCNDMATIM, 0x02); /* 2ms */
+
+ rtw_write8(adapter, REG_ATIMWND, 0x0a); /* 10ms */
+ rtw_write16(adapter, REG_BCNTCFG, 0x00);
+ rtw_write16(adapter, REG_TBTT_PROHIBIT, 0xff04);
+ rtw_write16(adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
+
+ /* reset TSF */
+ rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(0));
+
+ /* BIT(3) - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
+ res = rtw_read8(adapter, REG_MBID_NUM, &val8);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_MBID_NUM, val8 | BIT(3) | BIT(4));
+
+ /* enable BCN0 Function for if1 */
+ /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
+ rtw_write8(adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | BIT(1)));
+
+ /* dis BCN1 ATIM WND if if2 is station */
+ res = rtw_read8(adapter, REG_BCN_CTRL_1, &val8);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_BCN_CTRL_1, val8 | BIT(0));
+ }
}
/****************************************************************************
@@ -5698,9 +5848,70 @@
}
}
+void rtw_mlme_under_site_survey(struct adapter *adapter)
+{
+ /* config RCR to receive different BSSID & not to receive data frame */
+
+ int res;
+ u8 reg;
+ u32 v;
+
+ res = rtw_read32(adapter, REG_RCR, &v);
+ if (res)
+ return;
+
+ v &= ~(RCR_CBSSID_BCN);
+ rtw_write32(adapter, REG_RCR, v);
+ /* reject all data frame */
+ rtw_write16(adapter, REG_RXFLTMAP2, 0x00);
+
+ /* disable update TSF */
+ res = rtw_read8(adapter, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_BCN_CTRL, reg | BIT(4));
+}
+
+void rtw_mlme_site_survey_done(struct adapter *adapter)
+{
+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+ u32 reg32;
+ int res;
+ u8 reg;
+
+ if ((is_client_associated_to_ap(adapter)) ||
+ ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) {
+ /* enable to rx data frame */
+ rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF);
+
+ /* enable update TSF */
+ res = rtw_read8(adapter, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_BCN_CTRL, reg & (~BIT(4)));
+ } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
+ rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF);
+ /* enable update TSF */
+ res = rtw_read8(adapter, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_BCN_CTRL, reg & (~BIT(4)));
+ }
+
+ res = rtw_read32(adapter, REG_RCR, ®32);
+ if (res)
+ return;
+
+ rtw_write32(adapter, REG_RCR, reg32 | RCR_CBSSID_BCN);
+}
+
void site_survey(struct adapter *padapter)
{
- unsigned char survey_channel = 0, val8;
+ unsigned char survey_channel = 0;
enum rt_scan_type ScanType = SCAN_PASSIVE;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
@@ -5824,8 +6035,7 @@
if (is_client_associated_to_ap(padapter))
issue_nulldata(padapter, NULL, 0, 3, 500);
- val8 = 0; /* survey done */
- SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+ rtw_mlme_site_survey_done(padapter);
report_surveydone_event(padapter);
@@ -6002,7 +6212,9 @@
static void mlme_join(struct adapter *adapter, int type)
{
struct mlme_priv *mlmepriv = &adapter->mlmepriv;
- u8 retry_limit = 0x30;
+ u8 retry_limit = 0x30, reg;
+ u32 reg32;
+ int res;
switch (type) {
case 0:
@@ -6010,8 +6222,12 @@
/* enable to rx data frame, accept all data frame */
rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF);
+ res = rtw_read32(adapter, REG_RCR, ®32);
+ if (res)
+ return;
+
rtw_write32(adapter, REG_RCR,
- rtw_read32(adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
+ reg32 | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) {
retry_limit = 48;
@@ -6027,7 +6243,11 @@
case 2:
/* sta add event call back */
/* enable update TSF */
- rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) & (~BIT(4)));
+ res = rtw_read8(adapter, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_BCN_CTRL, reg & (~BIT(4)));
if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
retry_limit = 0x7;
@@ -6184,14 +6404,14 @@
set_link_timer(pmlmeext, REASSOC_TO);
}
-unsigned int receive_disconnect(struct adapter *padapter, unsigned char *MacAddr, unsigned short reason)
+void receive_disconnect(struct adapter *padapter, unsigned char *MacAddr, unsigned short reason)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
/* check A3 */
if (!(!memcmp(MacAddr, get_my_bssid(&pmlmeinfo->network), ETH_ALEN)))
- return _SUCCESS;
+ return;
if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) {
if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) {
@@ -6202,7 +6422,6 @@
report_join_res(padapter, -2);
}
}
- return _SUCCESS;
}
static void process_80211d(struct adapter *padapter, struct wlan_bssid_ex *bssid)
@@ -6640,6 +6859,23 @@
psta->state = _FW_LINKED;
}
+static void rtw_reset_dm_func_flag(struct adapter *adapter)
+{
+ struct hal_data_8188e *haldata = &adapter->haldata;
+ struct dm_priv *dmpriv = &haldata->dmpriv;
+ struct odm_dm_struct *odmpriv = &haldata->odmpriv;
+
+ odmpriv->SupportAbility = dmpriv->InitODMFlag;
+}
+
+static void rtw_clear_dm_func_flag(struct adapter *adapter)
+{
+ struct hal_data_8188e *haldata = &adapter->haldata;
+ struct odm_dm_struct *odmpriv = &haldata->odmpriv;
+
+ odmpriv->SupportAbility = 0;
+}
+
void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res)
{
struct sta_info *psta, *psta_bmc;
@@ -6670,12 +6906,12 @@
}
/* turn on dynamic functions */
- SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_RESET, NULL);
+ rtw_reset_dm_func_flag(padapter);
/* update IOT-releated issue */
update_IOT_info(padapter);
- SetHwReg8188EU(padapter, HW_VAR_BASIC_RATE, cur_network->SupportedRates);
+ rtw_set_basic_rate(padapter, cur_network->SupportedRates);
/* BCN interval */
rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
@@ -6702,14 +6938,14 @@
rtw_set_max_rpt_macid(padapter, psta->mac_id);
media_status = (psta->mac_id << 8) | 1; /* MACID|OPMODE: 1 means connect */
- SetHwReg8188EU(padapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status);
+ rtl8188e_set_FwMediaStatus_cmd(padapter, media_status);
}
mlme_join(padapter, 2);
if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) {
/* correcting TSF */
- correct_TSF(padapter, pmlmeext);
+ correct_TSF(padapter);
}
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, 0);
}
@@ -6724,7 +6960,7 @@
/* nothing to do */
} else { /* adhoc client */
/* correcting TSF */
- correct_TSF(padapter, pmlmeext);
+ correct_TSF(padapter);
/* start beacon */
if (send_beacon(padapter) == _FAIL) {
@@ -6748,6 +6984,9 @@
static void mlme_disconnect(struct adapter *adapter)
{
+ int res;
+ u8 reg;
+
/* Set RCR to not to receive data frame when NO LINK state */
/* reject all data frames */
rtw_write16(adapter, REG_RXFLTMAP2, 0x00);
@@ -6756,7 +6995,12 @@
rtw_write8(adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
/* disable update TSF */
- rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) | BIT(4));
+
+ res = rtw_read8(adapter, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_BCN_CTRL, reg | BIT(4));
}
void mlmeext_sta_del_event_callback(struct adapter *padapter)
@@ -6810,14 +7054,20 @@
return ret;
}
-static void rtl8188e_sreset_linked_status_check(struct adapter *padapter)
+static int rtl8188e_sreset_linked_status_check(struct adapter *padapter)
{
- u32 rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS);
+ u32 rx_dma_status;
+ int res;
+ u8 reg;
+
+ res = rtw_read32(padapter, REG_RXDMA_STATUS, &rx_dma_status);
+ if (res)
+ return res;
if (rx_dma_status != 0x00)
rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status);
- rtw_read8(padapter, REG_FMETHR);
+ return rtw_read8(padapter, REG_FMETHR, ®);
}
void linked_status_chk(struct adapter *padapter)
@@ -7045,7 +7295,7 @@
type = _HW_STATE_NOLINK_;
}
- SetHwReg8188EU(padapter, HW_VAR_SET_OPMODE, (u8 *)(&type));
+ rtw_set_opmode(padapter, type);
return H2C_SUCCESS;
}
@@ -7081,7 +7331,7 @@
/* disable dynamic functions, such as high power, DIG */
Save_DM_Func_Flag(padapter);
- SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_CLR, NULL);
+ rtw_clear_dm_func_flag(padapter);
/* cancel link timer */
_cancel_timer_ex(&pmlmeext->link_timer);
@@ -7089,7 +7339,7 @@
/* clear CAM */
flush_all_cam_entry(padapter);
- memcpy(pnetwork, pbuf, FIELD_OFFSET(struct wlan_bssid_ex, IELength));
+ memcpy(pnetwork, pbuf, offsetof(struct wlan_bssid_ex, IELength));
pnetwork->IELength = ((struct wlan_bssid_ex *)pbuf)->IELength;
if (pnetwork->IELength > MAX_IE_SZ)/* Check pbuf->IELength */
@@ -7146,7 +7396,7 @@
pmlmeinfo->candidate_tid_bitmap = 0;
pmlmeinfo->bwmode_updated = false;
- memcpy(pnetwork, pbuf, FIELD_OFFSET(struct wlan_bssid_ex, IELength));
+ memcpy(pnetwork, pbuf, offsetof(struct wlan_bssid_ex, IELength));
pnetwork->IELength = ((struct wlan_bssid_ex *)pbuf)->IELength;
if (pnetwork->IELength > MAX_IE_SZ)/* Check pbuf->IELength */
@@ -7219,6 +7469,7 @@
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network);
u8 val8;
+ int res;
if (is_client_associated_to_ap(padapter))
issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, param->deauth_timeout_ms / 100, 100);
@@ -7231,7 +7482,10 @@
if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
/* Stop BCN */
- val8 = rtw_read8(padapter, REG_BCN_CTRL);
+ res = rtw_read8(padapter, REG_BCN_CTRL, &val8);
+ if (res)
+ return H2C_DROPPED;
+
rtw_write8(padapter, REG_BCN_CTRL, val8 & (~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
}
@@ -7302,7 +7556,6 @@
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf;
u8 bdelayscan = false;
- u8 val8;
u32 i;
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
@@ -7347,7 +7600,7 @@
if ((pmlmeext->sitesurvey_res.state == SCAN_START) || (pmlmeext->sitesurvey_res.state == SCAN_TXNULL)) {
/* disable dynamic functions, such as high power, DIG */
Save_DM_Func_Flag(padapter);
- SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_CLR, NULL);
+ rtw_clear_dm_func_flag(padapter);
/* config the initial gain under scanning, need to write the BB registers */
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
@@ -7359,8 +7612,7 @@
/* set MSR to no link state */
Set_MSR(padapter, _HW_STATE_NOLINK_);
- val8 = 1; /* under site survey */
- SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+ rtw_mlme_under_site_survey(padapter);
pmlmeext->sitesurvey_res.state = SCAN_PROCESS;
}
@@ -7475,7 +7727,7 @@
if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) ||
((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
- issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid);
+ issue_action_BA(padapter, pparm->addr, WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid);
_set_timer(&psta->addba_retry_timer, ADDBA_TO);
} else {
psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid);
diff --git a/drivers/staging/r8188eu/core/rtw_p2p.c b/drivers/staging/r8188eu/core/rtw_p2p.c
index beffe5b..bd654d4 100644
--- a/drivers/staging/r8188eu/core/rtw_p2p.c
+++ b/drivers/staging/r8188eu/core/rtw_p2p.c
@@ -1450,10 +1450,9 @@
static void pre_tx_invitereq_handler(struct adapter *padapter)
{
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
- u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->invitereq_info.peer_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
- SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+ rtw_mlme_under_site_survey(padapter);
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@@ -1462,10 +1461,9 @@
static void pre_tx_provdisc_handler(struct adapter *padapter)
{
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
- u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
- SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+ rtw_mlme_under_site_survey(padapter);
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@@ -1474,10 +1472,9 @@
static void pre_tx_negoreq_handler(struct adapter *padapter)
{
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
- u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
- SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+ rtw_mlme_under_site_survey(padapter);
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@@ -1891,7 +1888,7 @@
if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT || role == P2P_ROLE_GO) {
/* leave IPS/Autosuspend */
- if (rtw_pwr_wakeup(padapter) == _FAIL) {
+ if (rtw_pwr_wakeup(padapter)) {
ret = _FAIL;
goto exit;
}
@@ -1905,7 +1902,7 @@
init_wifidirect_info(padapter, role);
} else if (role == P2P_ROLE_DISABLE) {
- if (rtw_pwr_wakeup(padapter) == _FAIL) {
+ if (rtw_pwr_wakeup(padapter)) {
ret = _FAIL;
goto exit;
}
diff --git a/drivers/staging/r8188eu/core/rtw_pwrctrl.c b/drivers/staging/r8188eu/core/rtw_pwrctrl.c
index 7b816b8..10550bd2 100644
--- a/drivers/staging/r8188eu/core/rtw_pwrctrl.c
+++ b/drivers/staging/r8188eu/core/rtw_pwrctrl.c
@@ -229,6 +229,9 @@
static bool lps_rf_on(struct adapter *adapter)
{
+ int res;
+ u32 reg;
+
/* When we halt NIC, we should check if FW LPS is leave. */
if (adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
/* If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
@@ -236,7 +239,11 @@
return true;
}
- if (rtw_read32(adapter, REG_RCR) & 0x00070000)
+ res = rtw_read32(adapter, REG_RCR, ®);
+ if (res)
+ return false;
+
+ if (reg & 0x00070000)
return false;
return true;
@@ -266,7 +273,7 @@
err = -1;
break;
}
- rtw_usleep_os(100);
+ msleep(1);
}
return err;
@@ -374,24 +381,24 @@
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
unsigned long timeout = jiffies + msecs_to_jiffies(3000);
unsigned long deny_time;
- int ret = _SUCCESS;
+ int ret;
while (pwrpriv->ps_processing && time_before(jiffies, timeout))
msleep(10);
/* I think this should be check in IPS, LPS, autosuspend functions... */
- if (check_fwstate(pmlmepriv, _FW_LINKED)) {
- ret = _SUCCESS;
+ /* Below goto is a success path taken for already linked devices */
+ ret = 0;
+ if (check_fwstate(pmlmepriv, _FW_LINKED))
goto exit;
- }
if (pwrpriv->rf_pwrstate == rf_off && ips_leave(padapter) == _FAIL) {
- ret = _FAIL;
+ ret = -ENOMEM;
goto exit;
}
if (padapter->bDriverStopped || !padapter->bup || !padapter->hw_init_completed) {
- ret = _FAIL;
+ ret = -EBUSY;
goto exit;
}
@@ -432,7 +439,7 @@
return 0;
} else if (mode == IPS_NONE) {
rtw_ips_mode_req(pwrctrlpriv, mode);
- if ((padapter->bSurpriseRemoved == 0) && (rtw_pwr_wakeup(padapter) == _FAIL))
+ if ((padapter->bSurpriseRemoved == 0) && rtw_pwr_wakeup(padapter))
return -EFAULT;
} else {
return -EINVAL;
diff --git a/drivers/staging/r8188eu/core/rtw_recv.c b/drivers/staging/r8188eu/core/rtw_recv.c
index df51843..e5a7b7d 100644
--- a/drivers/staging/r8188eu/core/rtw_recv.c
+++ b/drivers/staging/r8188eu/core/rtw_recv.c
@@ -17,14 +17,14 @@
/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
static u8 rtw_bridge_tunnel_header[] = {
- 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8
+ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8
};
static u8 rtw_rfc1042_header[] = {
- 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00
+ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00
};
-void rtw_signal_stat_timer_hdl(struct timer_list *);
+static void rtw_signal_stat_timer_hdl(struct timer_list *t);
void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv)
{
@@ -62,7 +62,7 @@
goto exit;
}
- precvpriv->precv_frame_buf = (u8 *)N_BYTE_ALIGMENT((size_t)(precvpriv->pallocated_frame_buf), RXFRAME_ALIGN_SZ);
+ precvpriv->precv_frame_buf = (u8 *)ALIGN((size_t)(precvpriv->pallocated_frame_buf), RXFRAME_ALIGN_SZ);
precvframe = (struct recv_frame *)precvpriv->precv_frame_buf;
@@ -166,10 +166,8 @@
list_add_tail(&precvframe->list, get_list_head(pfree_recv_queue));
- if (padapter) {
- if (pfree_recv_queue == &precvpriv->free_recv_queue)
- precvpriv->free_recvframe_cnt++;
- }
+ if (padapter && (pfree_recv_queue == &precvpriv->free_recv_queue))
+ precvpriv->free_recvframe_cnt++;
spin_unlock_bh(&pfree_recv_queue->lock);
@@ -204,12 +202,12 @@
}
/*
-caller : defrag ; recvframe_chk_defrag in recv_thread (passive)
-pframequeue: defrag_queue : will be accessed in recv_thread (passive)
-
-using spinlock to protect
-
-*/
+ * caller : defrag ; recvframe_chk_defrag in recv_thread (passive)
+ * pframequeue: defrag_queue : will be accessed in recv_thread (passive)
+ *
+ * using spinlock to protect
+ *
+ */
void rtw_free_recvframe_queue(struct __queue *pframequeue, struct __queue *pfree_recv_queue)
{
@@ -237,6 +235,7 @@
{
u32 cnt = 0;
struct recv_frame *pending_frame;
+
while ((pending_frame = rtw_alloc_recvframe(&adapter->recvpriv.uc_swdec_pending_queue))) {
rtw_free_recvframe(pending_frame, &adapter->recvpriv.free_recv_queue);
cnt++;
@@ -327,6 +326,7 @@
if (prxattrib->encrypt > 0) {
u8 *iv = precv_frame->rx_data + prxattrib->hdrlen;
+
prxattrib->key_index = (((iv[3]) >> 6) & 0x3);
if (prxattrib->key_index > WEP_KEYS) {
@@ -452,8 +452,7 @@
return _SUCCESS;
}
-void process_pwrbit_data(struct adapter *padapter, struct recv_frame *precv_frame);
-void process_pwrbit_data(struct adapter *padapter, struct recv_frame *precv_frame)
+static void process_pwrbit_data(struct adapter *padapter, struct recv_frame *precv_frame)
{
unsigned char pwrbit;
u8 *ptr = precv_frame->rx_data;
@@ -557,15 +556,9 @@
}
}
-int sta2sta_data_frame(
- struct adapter *adapter,
- struct recv_frame *precv_frame,
- struct sta_info **psta
-);
-
-int sta2sta_data_frame(struct adapter *adapter, struct recv_frame *precv_frame, struct sta_info **psta)
+static int sta2sta_data_frame(struct adapter *adapter,
+ struct recv_frame *precv_frame, struct sta_info **psta)
{
- u8 *ptr = precv_frame->rx_data;
int ret = _SUCCESS;
struct rx_pkt_attrib *pattrib = &precv_frame->attrib;
struct sta_priv *pstapriv = &adapter->stapriv;
@@ -620,12 +613,6 @@
sta_addr = pattrib->src;
}
} else if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) {
- memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN);
- memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN);
- memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN);
- memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
- memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
-
sta_addr = mybssid;
} else {
ret = _FAIL;
@@ -650,6 +637,7 @@
struct sta_info **psta)
{
u8 *ptr = precv_frame->rx_data;
+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)precv_frame->rx_data;
struct rx_pkt_attrib *pattrib = &precv_frame->attrib;
int ret = _SUCCESS;
struct sta_priv *pstapriv = &adapter->stapriv;
@@ -694,24 +682,16 @@
goto exit;
}
- /* if ((GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) { */
- /* */
-
- if (GetFrameSubType(ptr) & BIT(6)) {
- /* No data, will not indicate to upper layer, temporily count it here */
+ if (ieee80211_is_nullfunc(hdr->frame_control)) {
+ /* We count the nullfunc frame, but we'll not pass it on to higher layers. */
count_rx_stats(adapter, precv_frame, *psta);
ret = RTW_RX_HANDLED;
goto exit;
}
} else if (check_fwstate(pmlmepriv, WIFI_MP_STATE) &&
check_fwstate(pmlmepriv, _FW_LINKED)) {
- memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN);
memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN);
- memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN);
- memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
- memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
- /* */
memcpy(pattrib->bssid, mybssid, ETH_ALEN);
*psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get sta_info */
@@ -778,6 +758,7 @@
}
} else {
u8 *myhwaddr = myid(&adapter->eeprompriv);
+
if (memcmp(pattrib->ra, myhwaddr, ETH_ALEN)) {
ret = RTW_RX_HANDLED;
goto exit;
@@ -1023,6 +1004,7 @@
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
int ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, rtw_get_oper_ch(adapter));
+
if (ch_set_idx >= 0)
pmlmeext->channel_set[ch_set_idx].rx_count++;
}
@@ -1050,6 +1032,7 @@
retval = validate_recv_data_frame(adapter, precv_frame);
if (retval == _FAIL) {
struct recv_priv *precvpriv = &adapter->recvpriv;
+
precvpriv->rx_drop++;
}
}
@@ -1313,9 +1296,11 @@
struct rx_pkt_attrib *pattrib;
unsigned char *data_ptr;
struct sk_buff *sub_skb, *subframes[MAX_SUBFRAME_COUNT];
+
struct recv_priv *precvpriv = &padapter->recvpriv;
struct __queue *pfree_recv_queue = &precvpriv->free_recv_queue;
int ret = _SUCCESS;
+
nr_subframes = 0;
pattrib = &prframe->attrib;
@@ -1366,13 +1351,12 @@
a_len -= nSubframe_Length;
if (a_len != 0) {
padding_len = 4 - ((nSubframe_Length + ETH_HLEN) & (4 - 1));
- if (padding_len == 4) {
+ if (padding_len == 4)
padding_len = 0;
- }
- if (a_len < padding_len) {
+ if (a_len < padding_len)
goto exit;
- }
+
pdata += padding_len;
a_len -= padding_len;
}
@@ -1747,9 +1731,11 @@
!psecuritypriv->busetkipkey) {
rtw_enqueue_recvframe(rframe, &padapter->recvpriv.uc_swdec_pending_queue);
if (recvpriv->free_recvframe_cnt < NR_RECVFRAME / 4) {
- /* to prevent from recvframe starvation,
+ /*
+ * to prevent from recvframe starvation,
* get recvframe from uc_swdec_pending_queue to
- * free_recvframe_cnt */
+ * free_recvframe_cnt
+ */
rframe = rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue);
if (rframe)
goto do_posthandle;
@@ -1787,7 +1773,7 @@
return ret;
}
-void rtw_signal_stat_timer_hdl(struct timer_list *t)
+static void rtw_signal_stat_timer_hdl(struct timer_list *t)
{
struct adapter *adapter = from_timer(adapter, t, recvpriv.signal_stat_timer);
struct recv_priv *recvpriv = &adapter->recvpriv;
diff --git a/drivers/staging/r8188eu/core/rtw_wlan_util.c b/drivers/staging/r8188eu/core/rtw_wlan_util.c
index 392a657..3a002cb 100644
--- a/drivers/staging/r8188eu/core/rtw_wlan_util.c
+++ b/drivers/staging/r8188eu/core/rtw_wlan_util.c
@@ -264,23 +264,30 @@
void Save_DM_Func_Flag(struct adapter *padapter)
{
- u8 saveflag = true;
+ struct hal_data_8188e *haldata = &padapter->haldata;
+ struct odm_dm_struct *odmpriv = &haldata->odmpriv;
- SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&saveflag));
+ odmpriv->BK_SupportAbility = odmpriv->SupportAbility;
}
void Restore_DM_Func_Flag(struct adapter *padapter)
{
- u8 saveflag = false;
+ struct hal_data_8188e *haldata = &padapter->haldata;
+ struct odm_dm_struct *odmpriv = &haldata->odmpriv;
- SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&saveflag));
+ odmpriv->SupportAbility = odmpriv->BK_SupportAbility;
}
void Set_MSR(struct adapter *padapter, u8 type)
{
u8 val8;
+ int res;
- val8 = rtw_read8(padapter, MSR) & 0x0c;
+ res = rtw_read8(padapter, MSR, &val8);
+ if (res)
+ return;
+
+ val8 &= 0x0c;
val8 |= type;
rtw_write8(padapter, MSR, val8);
}
@@ -505,7 +512,11 @@
static void set_acm_ctrl(struct adapter *adapter, u8 acm_mask)
{
- u8 acmctrl = rtw_read8(adapter, REG_ACMHWCTRL);
+ u8 acmctrl;
+ int res = rtw_read8(adapter, REG_ACMHWCTRL, &acmctrl);
+
+ if (res)
+ return;
if (acm_mask > 1)
acmctrl = acmctrl | 0x1;
@@ -765,6 +776,7 @@
static void set_min_ampdu_spacing(struct adapter *adapter, u8 spacing)
{
u8 sec_spacing;
+ int res;
if (spacing <= 7) {
switch (adapter->securitypriv.dot11PrivacyAlgrthm) {
@@ -786,8 +798,38 @@
if (spacing < sec_spacing)
spacing = sec_spacing;
+ res = rtw_read8(adapter, REG_AMPDU_MIN_SPACE, &sec_spacing);
+ if (res)
+ return;
+
rtw_write8(adapter, REG_AMPDU_MIN_SPACE,
- (rtw_read8(adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | spacing);
+ (sec_spacing & 0xf8) | spacing);
+ }
+}
+
+static void set_ampdu_factor(struct adapter *adapter, u8 factor)
+{
+ u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
+ u8 FactorToSet;
+ u8 *pRegToSet;
+ u8 index = 0;
+
+ pRegToSet = RegToSet_Normal; /* 0xb972a841; */
+ FactorToSet = factor;
+ if (FactorToSet <= 3) {
+ FactorToSet = (1 << (FactorToSet + 2));
+ if (FactorToSet > 0xf)
+ FactorToSet = 0xf;
+
+ for (index = 0; index < 4; index++) {
+ if ((pRegToSet[index] & 0xf0) > (FactorToSet << 4))
+ pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet << 4);
+
+ if ((pRegToSet[index] & 0x0f) > FactorToSet)
+ pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
+
+ rtw_write8(adapter, (REG_AGGLEN_LMT + index), pRegToSet[index]);
+ }
}
}
@@ -817,7 +859,7 @@
set_min_ampdu_spacing(padapter, min_MPDU_spacing);
- SetHwReg8188EU(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len));
+ set_ampdu_factor(padapter, max_AMPDU_len);
}
void ERP_IE_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
@@ -1225,6 +1267,45 @@
enable_rate_adaptive(padapter, psta->mac_id);
}
+void rtw_set_basic_rate(struct adapter *adapter, u8 *rates)
+{
+ u16 BrateCfg = 0;
+ u8 RateIndex = 0;
+ int res;
+ u8 reg;
+
+ /* 2007.01.16, by Emily */
+ /* Select RRSR (in Legacy-OFDM and CCK) */
+ /* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
+ /* We do not use other rates. */
+ HalSetBrateCfg(adapter, rates, &BrateCfg);
+
+ /* 2011.03.30 add by Luke Lee */
+ /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
+ /* because CCK 2M has poor TXEVM */
+ /* CCK 5.5M & 11M ACK should be enabled for better performance */
+
+ BrateCfg = (BrateCfg | 0xd) & 0x15d;
+
+ BrateCfg |= 0x01; /* default enable 1M ACK rate */
+ /* Set RRSR rate table. */
+ rtw_write8(adapter, REG_RRSR, BrateCfg & 0xff);
+ rtw_write8(adapter, REG_RRSR + 1, (BrateCfg >> 8) & 0xff);
+ res = rtw_read8(adapter, REG_RRSR + 2, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapter, REG_RRSR + 2, reg & 0xf0);
+
+ /* Set RTS initial rate */
+ while (BrateCfg > 0x1) {
+ BrateCfg = (BrateCfg >> 1);
+ RateIndex++;
+ }
+ /* Ziv - Check */
+ rtw_write8(adapter, REG_INIRTS_RATE_SEL, RateIndex);
+}
+
/* Update RRSR and Rate for USERATE */
void update_tx_basic_rate(struct adapter *padapter, u8 wirelessmode)
{
@@ -1250,7 +1331,7 @@
else
update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB);
- SetHwReg8188EU(padapter, HW_VAR_BASIC_RATE, supported_rates);
+ rtw_set_basic_rate(padapter, supported_rates);
}
unsigned char check_assoc_AP(u8 *pframe, uint len)
@@ -1348,6 +1429,30 @@
rtw_write8(adapter, REG_RRSR + 2, val8);
};
+static void set_slot_time(struct adapter *adapter, u8 slot_time)
+{
+ u8 u1bAIFS, aSifsTime;
+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+
+ rtw_write8(adapter, REG_SLOT, slot_time);
+
+ if (pmlmeinfo->WMM_enable == 0) {
+ if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
+ aSifsTime = 10;
+ else
+ aSifsTime = 16;
+
+ u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
+
+ /* <Roger_EXP> Temporary removed, 2008.06.20. */
+ rtw_write8(adapter, REG_EDCA_VO_PARAM, u1bAIFS);
+ rtw_write8(adapter, REG_EDCA_VI_PARAM, u1bAIFS);
+ rtw_write8(adapter, REG_EDCA_BE_PARAM, u1bAIFS);
+ rtw_write8(adapter, REG_EDCA_BK_PARAM, u1bAIFS);
+ }
+}
+
void update_capinfo(struct adapter *Adapter, u16 updateCap)
{
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
@@ -1386,7 +1491,7 @@
}
}
- SetHwReg8188EU(Adapter, HW_VAR_SLOT_TIME, &pmlmeinfo->slotTime);
+ set_slot_time(Adapter, pmlmeinfo->slotTime);
}
void update_wireless_mode(struct adapter *padapter)
@@ -1466,26 +1571,6 @@
return _SUCCESS;
}
-void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len)
-{
- u8 *pIE;
- __le32 *pbuf;
-
- pIE = pframe + sizeof(struct ieee80211_hdr_3addr);
- pbuf = (__le32 *)pIE;
-
- pmlmeext->TSFValue = le32_to_cpu(*(pbuf + 1));
-
- pmlmeext->TSFValue = pmlmeext->TSFValue << 32;
-
- pmlmeext->TSFValue |= le32_to_cpu(*pbuf);
-}
-
-void correct_TSF(struct adapter *padapter, struct mlme_ext_priv *pmlmeext)
-{
- SetHwReg8188EU(padapter, HW_VAR_CORRECT_TSF, NULL);
-}
-
void beacon_timing_control(struct adapter *padapter)
{
SetBeaconRelatedRegisters8188EUsb(padapter);
diff --git a/drivers/staging/r8188eu/core/rtw_xmit.c b/drivers/staging/r8188eu/core/rtw_xmit.c
index 7135d89..24401f3 100644
--- a/drivers/staging/r8188eu/core/rtw_xmit.c
+++ b/drivers/staging/r8188eu/core/rtw_xmit.c
@@ -16,16 +16,13 @@
static void _init_txservq(struct tx_servq *ptxservq)
{
-
INIT_LIST_HEAD(&ptxservq->tx_pending);
rtw_init_queue(&ptxservq->sta_pending);
ptxservq->qcnt = 0;
-
}
void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv)
{
-
memset((unsigned char *)psta_xmitpriv, 0, sizeof(struct sta_xmit_priv));
spin_lock_init(&psta_xmitpriv->lock);
_init_txservq(&psta_xmitpriv->be_q);
@@ -34,7 +31,6 @@
_init_txservq(&psta_xmitpriv->vo_q);
INIT_LIST_HEAD(&psta_xmitpriv->legacy_dz);
INIT_LIST_HEAD(&psta_xmitpriv->apsd);
-
}
s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
@@ -78,7 +74,7 @@
res = _FAIL;
goto exit;
}
- pxmitpriv->pxmit_frame_buf = (u8 *)N_BYTE_ALIGMENT((size_t)(pxmitpriv->pallocated_frame_buf), 4);
+ pxmitpriv->pxmit_frame_buf = (u8 *)ALIGN((size_t)(pxmitpriv->pallocated_frame_buf), 4);
/* pxmitpriv->pxmit_frame_buf = pxmitpriv->pallocated_frame_buf + 4 - */
/* ((size_t) (pxmitpriv->pallocated_frame_buf) &3); */
@@ -115,7 +111,7 @@
goto exit;
}
- pxmitpriv->pxmitbuf = (u8 *)N_BYTE_ALIGMENT((size_t)(pxmitpriv->pallocated_xmitbuf), 4);
+ pxmitpriv->pxmitbuf = (u8 *)ALIGN((size_t)(pxmitpriv->pallocated_xmitbuf), 4);
/* pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 - */
/* ((size_t) (pxmitpriv->pallocated_xmitbuf) &3); */
@@ -155,7 +151,7 @@
goto exit;
}
- pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((size_t)(pxmitpriv->pallocated_xmit_extbuf), 4);
+ pxmitpriv->pxmit_extbuf = (u8 *)ALIGN((size_t)(pxmitpriv->pallocated_xmit_extbuf), 4);
pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf;
@@ -299,6 +295,7 @@
/* check HT op mode */
if (pattrib->ht_en) {
u8 htopmode = pmlmeinfo->HT_protection;
+
if ((pmlmeext->cur_bwmode && (htopmode == 2 || htopmode == 3)) ||
(!pmlmeext->cur_bwmode && htopmode == 3)) {
pattrib->vcs_mode = RTS_CTS;
@@ -445,10 +442,11 @@
pattrib->pktlen = pktfile.pkt_len;
- if (ETH_P_IP == pattrib->ether_type) {
+ if (pattrib->ether_type == ETH_P_IP) {
/* The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time */
/* to prevent DHCP protocol fail */
u8 tmp[24];
+
_rtw_pktfile_read(&pktfile, &tmp[0], 24);
pattrib->dhcp_pkt = 0;
if (pktfile.pkt_len > 282) {/* MINIMUM_DHCP_PACKET_SIZE) { */
@@ -627,7 +625,7 @@
if (pframe[1] & 2) /* From Ds == 1 */
rtw_secmicappend(&micdata, &pframe[24], 6);
else
- rtw_secmicappend(&micdata, &pframe[10], 6);
+ rtw_secmicappend(&micdata, &pframe[10], 6);
} else { /* ToDS == 0 */
rtw_secmicappend(&micdata, &pframe[4], 6); /* DA */
if (pframe[1] & 2) /* From Ds == 1 */
@@ -953,12 +951,11 @@
mpdu_len -= llc_sz;
}
- if ((pattrib->icv_len > 0) && (pattrib->bswenc)) {
+ if ((pattrib->icv_len > 0) && (pattrib->bswenc))
mpdu_len -= pattrib->icv_len;
- }
if (bmcst) {
- /* don't do fragment to broadcat/multicast packets */
+ /* don't do fragment to broadcast/multicast packets */
mem_sz = _rtw_pktfile_read(&pktfile, pframe, pattrib->pktlen);
} else {
mem_sz = _rtw_pktfile_read(&pktfile, pframe, mpdu_len);
@@ -1068,7 +1065,6 @@
}
break;
}
-
}
void rtw_count_tx_stats(struct adapter *padapter, struct xmit_frame *pxmitframe, int sz)
@@ -1315,7 +1311,6 @@
rtw_free_xmitframe(pxmitpriv, pxmitframe);
}
spin_unlock_bh(&pframequeue->lock);
-
}
s32 rtw_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe)
@@ -1505,7 +1500,6 @@
for (i = 0; i < entry; i++, phwxmit++)
phwxmit->accnt = 0;
-
}
static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
@@ -1732,7 +1726,7 @@
bool bmcst = is_multicast_ether_addr(pattrib->ra);
if (!check_fwstate(pmlmepriv, WIFI_AP_STATE))
- return ret;
+ return ret;
if (pattrib->psta)
psta = pattrib->psta;
@@ -1760,8 +1754,8 @@
pstapriv->tim_bitmap |= BIT(0);/* */
pstapriv->sta_dz_bitmap |= BIT(0);
-
- update_beacon(padapter, _TIM_IE_, NULL, false);/* tx bc/mc packets after upate bcn */
+ /* tx bc/mc packets after update bcn */
+ update_beacon(padapter, _TIM_IE_, NULL, false);
ret = true;
}
@@ -1811,7 +1805,7 @@
pstapriv->tim_bitmap |= BIT(psta->aid);
if (psta->sleepq_len == 1) {
- /* upate BCN for TIM IE */
+ /* update BCN for TIM IE */
update_beacon(padapter, _TIM_IE_, NULL, false);
}
}
@@ -2080,7 +2074,7 @@
if ((psta->sleepq_ac_len == 0) && (!psta->has_legacy_ac) && (wmmps_ac)) {
pstapriv->tim_bitmap &= ~BIT(psta->aid);
- /* upate BCN for TIM IE */
+ /* update BCN for TIM IE */
update_beacon(padapter, _TIM_IE_, NULL, false);
}
}
diff --git a/drivers/staging/r8188eu/hal/Hal8188EPwrSeq.c b/drivers/staging/r8188eu/hal/Hal8188EPwrSeq.c
deleted file mode 100644
index 6505e1f..0000000
--- a/drivers/staging/r8188eu/hal/Hal8188EPwrSeq.c
+++ /dev/null
@@ -1,45 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/* Copyright(c) 2007 - 2011 Realtek Corporation. */
-
-#include "../include/Hal8188EPwrSeq.h"
-#include "../include/rtl8188e_hal.h"
-
-struct wl_pwr_cfg rtl8188E_power_on_flow[] = {
- { 0x0006, PWR_CMD_POLLING, BIT(1), BIT(1) },
- { 0x0002, PWR_CMD_WRITE, BIT(0) | BIT(1), 0 }, /* reset BB */
- { 0x0026, PWR_CMD_WRITE, BIT(7), BIT(7) }, /* schmitt trigger */
- { 0x0005, PWR_CMD_WRITE, BIT(7), 0 }, /* disable HWPDN (control by DRV)*/
- { 0x0005, PWR_CMD_WRITE, BIT(4) | BIT(3), 0 }, /* disable WL suspend*/
- { 0x0005, PWR_CMD_WRITE, BIT(0), BIT(0) },
- { 0x0005, PWR_CMD_POLLING, BIT(0), 0 },
- { 0x0023, PWR_CMD_WRITE, BIT(4), 0 },
- { 0xFFFF, PWR_CMD_END, 0, 0 },
-};
-
-struct wl_pwr_cfg rtl8188E_card_disable_flow[] = {
- { 0x001F, PWR_CMD_WRITE, 0xFF, 0 }, /* turn off RF */
- { 0x0023, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* LDO Sleep mode */
- { 0x0005, PWR_CMD_WRITE, BIT(1), BIT(1) }, /* turn off MAC by HW state machine */
- { 0x0005, PWR_CMD_POLLING, BIT(1), 0 },
- { 0x0026, PWR_CMD_WRITE, BIT(7), BIT(7) }, /* schmitt trigger */
- { 0x0005, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) }, /* enable WL suspend */
- { 0x0007, PWR_CMD_WRITE, 0xFF, 0 }, /* enable bandgap mbias in suspend */
- { 0x0041, PWR_CMD_WRITE, BIT(4), 0 }, /* Clear SIC_EN register */
- { 0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* Set USB suspend enable local register */
- { 0xFFFF, PWR_CMD_END, 0, 0 },
-};
-
-/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
-struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = {
- { 0x0522, PWR_CMD_WRITE, 0xFF, 0x7F },/* Tx Pause */
- { 0x05F8, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
- { 0x05F9, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
- { 0x05FA, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
- { 0x05FB, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
- { 0x0002, PWR_CMD_WRITE, BIT(0), 0 }, /* CCK and OFDM are disabled, clocks are gated */
- { 0x0002, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US },
- { 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */
- { 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */
- { 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */
- { 0xFFFF, PWR_CMD_END, 0, 0 },
-};
diff --git a/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c b/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c
index 57e8f55..1e04de3 100644
--- a/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c
+++ b/drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c
@@ -279,6 +279,7 @@
{ /* Wilson 2011/10/26 */
u32 MaskFromReg;
s8 i;
+ int res;
switch (pRaInfo->RateID) {
case RATR_INX_WIRELESS_NGB:
@@ -303,19 +304,31 @@
pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x0000000d;
break;
case 12:
- MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR0);
+ res = rtw_read32(dm_odm->Adapter, REG_ARFR0, &MaskFromReg);
+ if (res)
+ return res;
+
pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg;
break;
case 13:
- MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR1);
+ res = rtw_read32(dm_odm->Adapter, REG_ARFR1, &MaskFromReg);
+ if (res)
+ return res;
+
pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg;
break;
case 14:
- MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR2);
+ res = rtw_read32(dm_odm->Adapter, REG_ARFR2, &MaskFromReg);
+ if (res)
+ return res;
+
pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg;
break;
case 15:
- MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR3);
+ res = rtw_read32(dm_odm->Adapter, REG_ARFR3, &MaskFromReg);
+ if (res)
+ return res;
+
pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg;
break;
default:
@@ -601,12 +614,12 @@
pRAInfo = &dm_odm->RAInfo[MacId];
if (valid) {
- pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
- pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
- pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2((u8 *)pBuffer);
- pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer);
- pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
- pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
+ pRAInfo->RTY[0] = le16_to_cpup((__le16 *)pBuffer);
+ pRAInfo->RTY[1] = pBuffer[2];
+ pRAInfo->RTY[2] = pBuffer[3];
+ pRAInfo->RTY[3] = pBuffer[4];
+ pRAInfo->RTY[4] = pBuffer[5];
+ pRAInfo->DROP = pBuffer[6];
pRAInfo->TOTAL = pRAInfo->RTY[0] + pRAInfo->RTY[1] +
pRAInfo->RTY[2] + pRAInfo->RTY[3] +
pRAInfo->RTY[4] + pRAInfo->DROP;
diff --git a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
index b944c80..525deab 100644
--- a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
@@ -463,6 +463,7 @@
}
}
+/* FIXME: return an error to caller */
static void _PHY_SaveMACRegisters(
struct adapter *adapt,
u32 *MACReg,
@@ -470,11 +471,20 @@
)
{
u32 i;
+ int res;
- for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
- MACBackup[i] = rtw_read8(adapt, MACReg[i]);
+ for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) {
+ u8 reg;
- MACBackup[i] = rtw_read32(adapt, MACReg[i]);
+ res = rtw_read8(adapt, MACReg[i], ®);
+ if (res)
+ return;
+
+ MACBackup[i] = reg;
+ }
+
+ res = rtw_read32(adapt, MACReg[i], MACBackup + i);
+ (void)res;
}
static void reload_adda_reg(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum)
@@ -739,9 +749,12 @@
{
u8 tmpreg;
u32 RF_Amode = 0, LC_Cal;
+ int res;
/* Check continuous TX and Packet TX */
- tmpreg = rtw_read8(adapt, 0xd03);
+ res = rtw_read8(adapt, 0xd03, &tmpreg);
+ if (res)
+ return;
if ((tmpreg & 0x70) != 0) /* Deal with contisuous TX case */
rtw_write8(adapt, 0xd03, tmpreg & 0x8F); /* disable all continuous TX */
diff --git a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
index 150ea38..6c0b136 100644
--- a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
+++ b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
@@ -3,25 +3,116 @@
#include "../include/HalPwrSeqCmd.h"
-u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg pwrseqcmd[])
+#define PWR_CMD_WRITE 0x01
+ /* offset: the read register offset */
+ /* msk: the mask of the write bits */
+ /* value: write value */
+ /* note: driver shall implement this cmd by read & msk after write */
+
+#define PWR_CMD_POLLING 0x02
+ /* offset: the read register offset */
+ /* msk: the mask of the polled value */
+ /* value: the value to be polled, masked by the msd field. */
+ /* note: driver shall implement this cmd by */
+ /* do{ */
+ /* if ( (Read(offset) & msk) == (value & msk) ) */
+ /* break; */
+ /* } while (not timeout); */
+
+#define PWR_CMD_DELAY 0x03
+ /* offset: the value to delay (in us) */
+ /* msk: N/A */
+ /* value: N/A */
+
+struct wl_pwr_cfg {
+ u16 offset;
+ u8 cmd:4;
+ u8 msk;
+ u8 value;
+};
+
+#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
+#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
+#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
+#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
+
+static struct wl_pwr_cfg rtl8188E_power_on_flow[] = {
+ { 0x0006, PWR_CMD_POLLING, BIT(1), BIT(1) },
+ { 0x0002, PWR_CMD_WRITE, BIT(0) | BIT(1), 0 }, /* reset BB */
+ { 0x0026, PWR_CMD_WRITE, BIT(7), BIT(7) }, /* schmitt trigger */
+ { 0x0005, PWR_CMD_WRITE, BIT(7), 0 }, /* disable HWPDN (control by DRV)*/
+ { 0x0005, PWR_CMD_WRITE, BIT(4) | BIT(3), 0 }, /* disable WL suspend*/
+ { 0x0005, PWR_CMD_WRITE, BIT(0), BIT(0) },
+ { 0x0005, PWR_CMD_POLLING, BIT(0), 0 },
+ { 0x0023, PWR_CMD_WRITE, BIT(4), 0 },
+};
+
+static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = {
+ { 0x001F, PWR_CMD_WRITE, 0xFF, 0 }, /* turn off RF */
+ { 0x0023, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* LDO Sleep mode */
+ { 0x0005, PWR_CMD_WRITE, BIT(1), BIT(1) }, /* turn off MAC by HW state machine */
+ { 0x0005, PWR_CMD_POLLING, BIT(1), 0 },
+ { 0x0026, PWR_CMD_WRITE, BIT(7), BIT(7) }, /* schmitt trigger */
+ { 0x0005, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) }, /* enable WL suspend */
+ { 0x0007, PWR_CMD_WRITE, 0xFF, 0 }, /* enable bandgap mbias in suspend */
+ { 0x0041, PWR_CMD_WRITE, BIT(4), 0 }, /* Clear SIC_EN register */
+ { 0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* Set USB suspend enable local register */
+};
+
+/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
+static struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = {
+ { 0x0522, PWR_CMD_WRITE, 0xFF, 0x7F },/* Tx Pause */
+ { 0x05F8, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
+ { 0x05F9, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
+ { 0x05FA, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
+ { 0x05FB, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
+ { 0x0002, PWR_CMD_WRITE, BIT(0), 0 }, /* CCK and OFDM are disabled, clocks are gated */
+ { 0x0002, PWR_CMD_DELAY, 0, 0 },
+ { 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */
+ { 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */
+ { 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */
+};
+
+u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
{
struct wl_pwr_cfg pwrcfgcmd = {0};
+ struct wl_pwr_cfg *pwrseqcmd;
u8 poll_bit = false;
- u32 aryidx = 0;
+ u8 idx, num_steps;
u8 value = 0;
u32 offset = 0;
u32 poll_count = 0; /* polling autoload done. */
u32 max_poll_count = 5000;
+ int res;
- do {
- pwrcfgcmd = pwrseqcmd[aryidx];
+ switch (seq) {
+ case PWR_ON_FLOW:
+ pwrseqcmd = rtl8188E_power_on_flow;
+ num_steps = ARRAY_SIZE(rtl8188E_power_on_flow);
+ break;
+ case DISABLE_FLOW:
+ pwrseqcmd = rtl8188E_card_disable_flow;
+ num_steps = ARRAY_SIZE(rtl8188E_card_disable_flow);
+ break;
+ case LPS_ENTER_FLOW:
+ pwrseqcmd = rtl8188E_enter_lps_flow;
+ num_steps = ARRAY_SIZE(rtl8188E_enter_lps_flow);
+ break;
+ default:
+ return false;
+ }
+
+ for (idx = 0; idx < num_steps; idx++) {
+ pwrcfgcmd = pwrseqcmd[idx];
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_WRITE:
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
/* Read the value from system register */
- value = rtw_read8(padapter, offset);
+ res = rtw_read8(padapter, offset, &value);
+ if (res)
+ return false;
value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd));
@@ -33,7 +124,9 @@
poll_bit = false;
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
do {
- value = rtw_read8(padapter, offset);
+ res = rtw_read8(padapter, offset, &value);
+ if (res)
+ return false;
value &= GET_PWR_CFG_MASK(pwrcfgcmd);
if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)))
@@ -46,20 +139,11 @@
} while (!poll_bit);
break;
case PWR_CMD_DELAY:
- if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
- udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
- else
- udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000);
- break;
- case PWR_CMD_END:
- /* When this command is parsed, end the process */
- return true;
+ udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
break;
default:
break;
}
-
- aryidx++;/* Add Array Index */
- } while (1);
+ }
return true;
}
diff --git a/drivers/staging/r8188eu/hal/hal_com.c b/drivers/staging/r8188eu/hal/hal_com.c
index 910cc07..6a1cdc6 100644
--- a/drivers/staging/r8188eu/hal/hal_com.c
+++ b/drivers/staging/r8188eu/hal/hal_com.c
@@ -10,45 +10,6 @@
#define _HAL_INIT_C_
-void dump_chip_info(struct HAL_VERSION chip_vers)
-{
- uint cnt = 0;
- char buf[128];
-
- cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_");
- cnt += sprintf((buf + cnt), "%s_", IS_NORMAL_CHIP(chip_vers) ?
- "Normal_Chip" : "Test_Chip");
- cnt += sprintf((buf + cnt), "%s_", IS_CHIP_VENDOR_TSMC(chip_vers) ?
- "TSMC" : "UMC");
-
- switch (chip_vers.CUTVersion) {
- case A_CUT_VERSION:
- cnt += sprintf((buf + cnt), "A_CUT_");
- break;
- case B_CUT_VERSION:
- cnt += sprintf((buf + cnt), "B_CUT_");
- break;
- case C_CUT_VERSION:
- cnt += sprintf((buf + cnt), "C_CUT_");
- break;
- case D_CUT_VERSION:
- cnt += sprintf((buf + cnt), "D_CUT_");
- break;
- case E_CUT_VERSION:
- cnt += sprintf((buf + cnt), "E_CUT_");
- break;
- default:
- cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_", chip_vers.CUTVersion);
- break;
- }
-
- cnt += sprintf((buf + cnt), "1T1R_");
-
- cnt += sprintf((buf + cnt), "RomVer(%d)\n", 0);
-
- pr_info("%s", buf);
-}
-
#define CHAN_PLAN_HW 0x80
u8 /* return the final channel plan decision */
@@ -303,7 +264,9 @@
if (!buf)
goto exit;
- trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
+ ret = rtw_read8(adapter, REG_C2HEVT_CLEAR, &trigger);
+ if (ret)
+ return _FAIL;
if (trigger == C2H_EVT_HOST_CLOSE)
goto exit; /* Not ready */
@@ -314,13 +277,26 @@
memset(c2h_evt, 0, 16);
- *buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
- *(buf + 1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
+ ret = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL, buf);
+ if (ret) {
+ ret = _FAIL;
+ goto clear_evt;
+ }
+ ret = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1, buf + 1);
+ if (ret) {
+ ret = _FAIL;
+ goto clear_evt;
+ }
/* Read the content */
- for (i = 0; i < c2h_evt->plen; i++)
- c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL +
- sizeof(*c2h_evt) + i);
+ for (i = 0; i < c2h_evt->plen; i++) {
+ ret = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL +
+ sizeof(*c2h_evt) + i, c2h_evt->payload + i);
+ if (ret) {
+ ret = _FAIL;
+ goto clear_evt;
+ }
+ }
ret = _SUCCESS;
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_cmd.c b/drivers/staging/r8188eu/hal/rtl8188e_cmd.c
index 475650d..b01ee16 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_cmd.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_cmd.c
@@ -18,13 +18,18 @@
static u8 _is_fw_read_cmd_down(struct adapter *adapt, u8 msgbox_num)
{
- u8 read_down = false;
+ u8 read_down = false, reg;
int retry_cnts = 100;
+ int res;
u8 valid;
do {
- valid = rtw_read8(adapt, REG_HMETFR) & BIT(msgbox_num);
+ res = rtw_read8(adapt, REG_HMETFR, ®);
+ if (res)
+ continue;
+
+ valid = reg & BIT(msgbox_num);
if (0 == valid)
read_down = true;
} while ((!read_down) && (retry_cnts--));
@@ -533,6 +538,8 @@
bool bcn_valid = false;
u8 DLBcnCount = 0;
u32 poll = 0;
+ u8 reg;
+ int res;
if (mstatus == 1) {
/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
@@ -547,8 +554,17 @@
/* Disable Hw protection for a time which revserd for Hw sending beacon. */
/* Fix download reserved page packet fail that access collision with the protection time. */
/* 2010.05.11. Added by tynli. */
- rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) & (~BIT(3)));
- rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) | BIT(4));
+ res = rtw_read8(adapt, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapt, REG_BCN_CTRL, reg & (~BIT(3)));
+
+ res = rtw_read8(adapt, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapt, REG_BCN_CTRL, reg | BIT(4));
if (haldata->RegFwHwTxQCtrl & BIT(6))
bSendBeacon = true;
@@ -581,8 +597,17 @@
/* */
/* Enable Bcn */
- rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) | BIT(3));
- rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) & (~BIT(4)));
+ res = rtw_read8(adapt, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapt, REG_BCN_CTRL, reg | BIT(3));
+
+ res = rtw_read8(adapt, REG_BCN_CTRL, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapt, REG_BCN_CTRL, reg & (~BIT(4)));
/* To make sure that if there exists an adapter which would like to send beacon. */
/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_dm.c b/drivers/staging/r8188eu/hal/rtl8188e_dm.c
index 6d28e3d..0399872 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_dm.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_dm.c
@@ -12,8 +12,12 @@
static void dm_InitGPIOSetting(struct adapter *Adapter)
{
u8 tmp1byte;
+ int res;
- tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
+ res = rtw_read8(Adapter, REG_GPIO_MUXCFG, &tmp1byte);
+ if (res)
+ return;
+
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c
index e17375a..5b8f1a9 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c
@@ -13,10 +13,14 @@
static void iol_mode_enable(struct adapter *padapter, u8 enable)
{
u8 reg_0xf0 = 0;
+ int res;
if (enable) {
/* Enable initial offload */
- reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
+ res = rtw_read8(padapter, REG_SYS_CFG, ®_0xf0);
+ if (res)
+ return;
+
rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 | SW_OFFLOAD_EN);
if (!padapter->bFWReady)
@@ -24,7 +28,10 @@
} else {
/* disable initial offload */
- reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
+ res = rtw_read8(padapter, REG_SYS_CFG, ®_0xf0);
+ if (res)
+ return;
+
rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
}
}
@@ -34,17 +41,31 @@
s32 status = _FAIL;
u8 reg_0x88 = 0;
unsigned long timeout;
+ int res;
control = control & 0x0f;
- reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
+ res = rtw_read8(padapter, REG_HMEBOX_E0, ®_0x88);
+ if (res)
+ return _FAIL;
+
rtw_write8(padapter, REG_HMEBOX_E0, reg_0x88 | control);
timeout = jiffies + msecs_to_jiffies(1000);
- while ((reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0)) & control &&
- time_before(jiffies, timeout))
- ;
- reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
+ do {
+ res = rtw_read8(padapter, REG_HMEBOX_E0, ®_0x88);
+ if (res)
+ continue;
+
+ if (!(reg_0x88 & control))
+ break;
+
+ } while (time_before(jiffies, timeout));
+
+ res = rtw_read8(padapter, REG_HMEBOX_E0, ®_0x88);
+ if (res)
+ return _FAIL;
+
status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
if (reg_0x88 & control << 4)
status = _FAIL;
@@ -62,7 +83,7 @@
}
static void
-efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
+efuse_phymap_to_logical(u8 *phymap, u16 _size_byte, u8 *pbuf)
{
u8 *efuseTbl = NULL;
u8 rtemp8;
@@ -70,7 +91,6 @@
u8 offset, wren;
u16 i, j;
u16 **eFuseWord = NULL;
- u16 efuse_utilized = 0;
u8 u1temp = 0;
efuseTbl = kzalloc(EFUSE_MAP_LEN_88E, GFP_KERNEL);
@@ -92,7 +112,6 @@
/* */
rtemp8 = *(phymap + eFuse_Addr);
if (rtemp8 != 0xFF) {
- efuse_utilized++;
eFuse_Addr++;
} else {
goto exit;
@@ -130,13 +149,11 @@
if (!(wren & 0x01)) {
rtemp8 = *(phymap + eFuse_Addr);
eFuse_Addr++;
- efuse_utilized++;
eFuseWord[offset][i] = (rtemp8 & 0xff);
if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
break;
rtemp8 = *(phymap + eFuse_Addr);
eFuse_Addr++;
- efuse_utilized++;
eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00);
if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
@@ -149,7 +166,6 @@
rtemp8 = *(phymap + eFuse_Addr);
if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
- efuse_utilized++;
eFuse_Addr++;
}
}
@@ -167,59 +183,70 @@
/* */
/* 4. Copy from Efuse map to output pointer memory!!! */
/* */
- for (i = 0; i < _size_byte; i++)
- pbuf[i] = efuseTbl[_offset + i];
-
- /* */
- /* 5. Calculate Efuse utilization. */
- /* */
+ memcpy(pbuf, efuseTbl, _size_byte);
exit:
kfree(efuseTbl);
kfree(eFuseWord);
}
-static void efuse_read_phymap_from_txpktbuf(
+/* FIXME: add error handling in callers */
+static int efuse_read_phymap_from_txpktbuf(
struct adapter *adapter,
- int bcnhead, /* beacon head, where FW store len(2-byte) and efuse physical map. */
u8 *content, /* buffer to store efuse physical map */
u16 *size /* for efuse content: the max byte to read. will update to byte read */
)
{
unsigned long timeout;
- u16 dbg_addr = 0;
__le32 lo32 = 0, hi32 = 0;
u16 len = 0, count = 0;
- int i = 0;
+ int i = 0, res;
u16 limit = *size;
-
+ u8 reg;
u8 *pos = content;
-
- if (bcnhead < 0) /* if not valid */
- bcnhead = rtw_read8(adapter, REG_TDECTRL + 1);
+ u32 reg32;
rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
- dbg_addr = bcnhead * 128 / 8; /* 8-bytes addressing */
-
while (1) {
- rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr + i);
+ rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, i);
rtw_write8(adapter, REG_TXPKTBUF_DBG, 0);
timeout = jiffies + msecs_to_jiffies(1000);
- while (!rtw_read8(adapter, REG_TXPKTBUF_DBG) && time_before(jiffies, timeout))
- rtw_usleep_os(100);
+ do {
+ res = rtw_read8(adapter, REG_TXPKTBUF_DBG, ®);
+ if (res)
+ continue;
+
+ if (reg)
+ break;
+
+ msleep(1);
+ } while (time_before(jiffies, timeout));
/* data from EEPROM needs to be in LE */
- lo32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L));
- hi32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H));
+ res = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L, ®32);
+ if (res)
+ return res;
+
+ lo32 = cpu_to_le32(reg32);
+
+ res = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H, ®32);
+ if (res)
+ return res;
+
+ hi32 = cpu_to_le32(reg32);
if (i == 0) {
+ u16 reg;
+
/* Although lenc is only used in a debug statement,
* do not remove it as the rtw_read16() call consumes
* 2 bytes from the EEPROM source.
*/
- rtw_read16(adapter, REG_PKTBUF_DBG_DATA_L);
+ res = rtw_read16(adapter, REG_PKTBUF_DBG_DATA_L, ®);
+ if (res)
+ return res;
len = le32_to_cpu(lo32) & 0x0000ffff;
@@ -246,21 +273,23 @@
}
rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS);
*size = count;
+
+ return 0;
}
-static s32 iol_read_efuse(struct adapter *padapter, u8 txpktbuf_bndy, u16 offset, u16 size_byte, u8 *logical_map)
+static s32 iol_read_efuse(struct adapter *padapter, u16 size_byte, u8 *logical_map)
{
s32 status = _FAIL;
u8 physical_map[512];
u16 size = 512;
- rtw_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy);
+ rtw_write8(padapter, REG_TDECTRL + 1, 0);
memset(physical_map, 0xFF, 512);
rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
status = iol_execute(padapter, CMD_READ_EFUSE_MAP);
if (status == _SUCCESS)
- efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size);
- efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map);
+ efuse_read_phymap_from_txpktbuf(padapter, physical_map, &size);
+ efuse_phymap_to_logical(physical_map, size_byte, logical_map);
return status;
}
@@ -321,25 +350,35 @@
void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 PwrState)
{
u16 tmpV16;
+ int res;
if (PwrState) {
rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
/* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */
- tmpV16 = rtw_read16(pAdapter, REG_SYS_ISO_CTRL);
+ res = rtw_read16(pAdapter, REG_SYS_ISO_CTRL, &tmpV16);
+ if (res)
+ return;
+
if (!(tmpV16 & PWC_EV12V)) {
tmpV16 |= PWC_EV12V;
rtw_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16);
}
/* Reset: 0x0000h[28], default valid */
- tmpV16 = rtw_read16(pAdapter, REG_SYS_FUNC_EN);
+ res = rtw_read16(pAdapter, REG_SYS_FUNC_EN, &tmpV16);
+ if (res)
+ return;
+
if (!(tmpV16 & FEN_ELDR)) {
tmpV16 |= FEN_ELDR;
rtw_write16(pAdapter, REG_SYS_FUNC_EN, tmpV16);
}
/* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */
- tmpV16 = rtw_read16(pAdapter, REG_SYS_CLKR);
+ res = rtw_read16(pAdapter, REG_SYS_CLKR, &tmpV16);
+ if (res)
+ return;
+
if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) {
tmpV16 |= (LOADER_CLK_EN | ANA8M);
rtw_write16(pAdapter, REG_SYS_CLKR, tmpV16);
@@ -470,26 +509,60 @@
kfree(eFuseWord);
}
-static void ReadEFuseByIC(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf)
+void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _size_byte, u8 *pbuf)
{
int ret = _FAIL;
if (rtw_IOL_applied(Adapter)) {
rtl8188eu_InitPowerOn(Adapter);
iol_mode_enable(Adapter, 1);
- ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf);
+ ret = iol_read_efuse(Adapter, _size_byte, pbuf);
iol_mode_enable(Adapter, 0);
if (_SUCCESS == ret)
return;
}
- Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf);
+ Hal_EfuseReadEFuse88E(Adapter, 0, _size_byte, pbuf);
}
-void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf)
+static void dump_chip_info(struct HAL_VERSION chip_vers)
{
- ReadEFuseByIC(Adapter, _offset, _size_byte, pbuf);
+ uint cnt = 0;
+ char buf[128];
+
+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_");
+ cnt += sprintf((buf + cnt), "%s_", IS_NORMAL_CHIP(chip_vers) ?
+ "Normal_Chip" : "Test_Chip");
+ cnt += sprintf((buf + cnt), "%s_", IS_CHIP_VENDOR_TSMC(chip_vers) ?
+ "TSMC" : "UMC");
+
+ switch (chip_vers.CUTVersion) {
+ case A_CUT_VERSION:
+ cnt += sprintf((buf + cnt), "A_CUT_");
+ break;
+ case B_CUT_VERSION:
+ cnt += sprintf((buf + cnt), "B_CUT_");
+ break;
+ case C_CUT_VERSION:
+ cnt += sprintf((buf + cnt), "C_CUT_");
+ break;
+ case D_CUT_VERSION:
+ cnt += sprintf((buf + cnt), "D_CUT_");
+ break;
+ case E_CUT_VERSION:
+ cnt += sprintf((buf + cnt), "E_CUT_");
+ break;
+ default:
+ cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_", chip_vers.CUTVersion);
+ break;
+ }
+
+ cnt += sprintf((buf + cnt), "1T1R_");
+
+ cnt += sprintf((buf + cnt), "RomVer(%d)\n", 0);
+
+ pr_info("%s", buf);
}
void rtl8188e_read_chip_version(struct adapter *padapter)
@@ -497,8 +570,12 @@
u32 value32;
struct HAL_VERSION ChipVersion;
struct hal_data_8188e *pHalData = &padapter->haldata;
+ int res;
- value32 = rtw_read32(padapter, REG_SYS_CFG);
+ res = rtw_read32(padapter, REG_SYS_CFG, &value32);
+ if (res)
+ return;
+
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
@@ -525,10 +602,17 @@
void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
{
+ int res;
+ u8 reg;
+
+ res = rtw_read8(adapter, rOFDM0_RxDSP + 1, ®);
+ if (res)
+ return;
+
if (enable)
- rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
+ rtw_write8(adapter, rOFDM0_RxDSP + 1, reg | BIT(1));
else
- rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
+ rtw_write8(adapter, rOFDM0_RxDSP + 1, reg & ~BIT(1));
}
/* */
@@ -538,26 +622,24 @@
/* */
static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
{
- s32 status = _SUCCESS;
- s32 count = 0;
+ s32 count;
u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
u16 LLTReg = REG_LLT_INIT;
+ int res;
rtw_write32(padapter, LLTReg, value);
/* polling */
- do {
- value = rtw_read32(padapter, LLTReg);
+ for (count = 0; count <= POLLING_LLT_THRESHOLD; count++) {
+ res = rtw_read32(padapter, LLTReg, &value);
+ if (res)
+ continue;
+
if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
break;
+ }
- if (count > POLLING_LLT_THRESHOLD) {
- status = _FAIL;
- break;
- }
- } while (count++);
-
- return status;
+ return count > POLLING_LLT_THRESHOLD ? _FAIL : _SUCCESS;
}
s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index 4864daf..dea6d91 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -56,8 +56,12 @@
)
{
u32 ReturnValue = 0, OriginalValue, BitShift;
+ int res;
- OriginalValue = rtw_read32(Adapter, RegAddr);
+ res = rtw_read32(Adapter, RegAddr, &OriginalValue);
+ if (res)
+ return 0;
+
BitShift = phy_CalculateBitShift(BitMask);
ReturnValue = (OriginalValue & BitMask) >> BitShift;
return ReturnValue;
@@ -84,9 +88,13 @@
void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data)
{
u32 OriginalValue, BitShift;
+ int res;
if (BitMask != bMaskDWord) { /* if not "double word" write */
- OriginalValue = rtw_read32(Adapter, RegAddr);
+ res = rtw_read32(Adapter, RegAddr, &OriginalValue);
+ if (res)
+ return;
+
BitShift = phy_CalculateBitShift(BitMask);
Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
}
@@ -484,13 +492,17 @@
{
int rtStatus = _SUCCESS;
struct hal_data_8188e *pHalData = &Adapter->haldata;
- u32 RegVal;
+ u16 RegVal;
u8 CrystalCap;
+ int res;
phy_InitBBRFRegisterDefinition(Adapter);
/* Enable BB and RF */
- RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+ res = rtw_read16(Adapter, REG_SYS_FUNC_EN, &RegVal);
+ if (res)
+ return _FAIL;
+
rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal | BIT(13) | BIT(0) | BIT(1)));
/* 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. */
@@ -594,6 +606,7 @@
struct hal_data_8188e *pHalData = &Adapter->haldata;
u8 regBwOpMode;
u8 regRRSR_RSC;
+ int res;
if (Adapter->bDriverStopped)
return;
@@ -602,8 +615,13 @@
/* 3<1>Set MAC register */
/* 3 */
- regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE);
- regRRSR_RSC = rtw_read8(Adapter, REG_RRSR + 2);
+ res = rtw_read8(Adapter, REG_BWOPMODE, ®BwOpMode);
+ if (res)
+ return;
+
+ res = rtw_read8(Adapter, REG_RRSR + 2, ®RRSR_RSC);
+ if (res)
+ return;
switch (pHalData->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
diff --git a/drivers/staging/r8188eu/hal/rtl8188eu_recv.c b/drivers/staging/r8188eu/hal/rtl8188eu_recv.c
index 727e1ad..def6d0d 100644
--- a/drivers/staging/r8188eu/hal/rtl8188eu_recv.c
+++ b/drivers/staging/r8188eu/hal/rtl8188eu_recv.c
@@ -32,7 +32,7 @@
goto exit;
}
- precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((size_t)(precvpriv->pallocated_recv_buf), 4);
+ precvpriv->precv_buf = (u8 *)ALIGN((size_t)(precvpriv->pallocated_recv_buf), 4);
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
diff --git a/drivers/staging/r8188eu/hal/usb_halinit.c b/drivers/staging/r8188eu/hal/usb_halinit.c
index a217272..ff074d2 100644
--- a/drivers/staging/r8188eu/hal/usb_halinit.c
+++ b/drivers/staging/r8188eu/hal/usb_halinit.c
@@ -11,7 +11,7 @@
#include "../include/rtw_iol.h"
#include "../include/usb_ops.h"
#include "../include/usb_osintf.h"
-#include "../include/Hal8188EPwrSeq.h"
+#include "../include/HalPwrSeqCmd.h"
static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
{
@@ -52,12 +52,14 @@
u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
{
u16 value16;
+ int res;
+
/* HW Power on sequence */
struct hal_data_8188e *haldata = &adapt->haldata;
if (haldata->bMacPwrCtrlOn)
return _SUCCESS;
- if (!HalPwrSeqCmdParsing(adapt, Rtl8188E_NIC_PWR_ON_FLOW))
+ if (!HalPwrSeqCmdParsing(adapt, PWR_ON_FLOW))
return _FAIL;
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
@@ -65,7 +67,10 @@
rtw_write16(adapt, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
- value16 = rtw_read16(adapt, REG_CR);
+ res = rtw_read16(adapt, REG_CR, &value16);
+ if (res)
+ return _FAIL;
+
value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
| PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
/* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
@@ -81,6 +86,7 @@
{
u32 imr, imr_ex;
u8 usb_opt;
+ int res;
/* HISR write one to clear */
rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
@@ -94,7 +100,9 @@
/* REG_USB_SPECIAL_OPTION - BIT(4) */
/* 0; Use interrupt endpoint to upload interrupt pkt */
/* 1; Use bulk endpoint to upload interrupt pkt, */
- usb_opt = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
+ res = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION, &usb_opt);
+ if (res)
+ return;
if (adapter_to_dvobj(Adapter)->pusbdev->speed == USB_SPEED_HIGH)
usb_opt = usb_opt | (INT_BULK_SEL);
@@ -163,7 +171,14 @@
u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
u16 hiQ)
{
- u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
+ u16 value16;
+ int res;
+
+ res = rtw_read16(Adapter, REG_TRXDMA_CTRL, &value16);
+ if (res)
+ return;
+
+ value16 &= 0x7;
value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
_TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
@@ -282,8 +297,12 @@
static void _InitNetworkType(struct adapter *Adapter)
{
u32 value32;
+ int res;
- value32 = rtw_read32(Adapter, REG_CR);
+ res = rtw_read32(Adapter, REG_CR, &value32);
+ if (res)
+ return;
+
/* TODO: use the other function to set network type */
value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
@@ -323,9 +342,13 @@
{
u16 value16;
u32 value32;
+ int res;
/* Response Rate Set */
- value32 = rtw_read32(Adapter, REG_RRSR);
+ res = rtw_read32(Adapter, REG_RRSR, &value32);
+ if (res)
+ return;
+
value32 &= ~RATE_BITMAP_ALL;
value32 |= RATE_RRSR_CCK_ONLY_1M;
rtw_write32(Adapter, REG_RRSR, value32);
@@ -363,8 +386,12 @@
static void _InitRetryFunction(struct adapter *Adapter)
{
u8 value8;
+ int res;
- value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
+ res = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL, &value8);
+ if (res)
+ return;
+
value8 |= EN_AMPDU_RTY_NEW;
rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
@@ -390,11 +417,15 @@
static void usb_AggSettingTxUpdate(struct adapter *Adapter)
{
u32 value32;
+ int res;
if (Adapter->registrypriv.wifi_spec)
return;
- value32 = rtw_read32(Adapter, REG_TDECTRL);
+ res = rtw_read32(Adapter, REG_TDECTRL, &value32);
+ if (res)
+ return;
+
value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
value32 |= ((USB_TXAGG_DESC_NUM & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
@@ -423,9 +454,15 @@
{
u8 valueDMA;
u8 valueUSB;
+ int res;
- valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL);
- valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
+ res = rtw_read8(Adapter, REG_TRXDMA_CTRL, &valueDMA);
+ if (res)
+ return;
+
+ res = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION, &valueUSB);
+ if (res)
+ return;
valueDMA |= RXDMA_AGG_EN;
valueUSB &= ~USB_AGG_EN;
@@ -446,9 +483,11 @@
usb_AggSettingRxUpdate(Adapter);
}
-static void _InitBeaconParameters(struct adapter *Adapter)
+/* FIXME: add error handling in callers */
+static int _InitBeaconParameters(struct adapter *Adapter)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
+ int res;
rtw_write16(Adapter, REG_BCN_CTRL, 0x1010);
@@ -461,9 +500,19 @@
/* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
rtw_write16(Adapter, REG_BCNTCFG, 0x660F);
- haldata->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL + 2);
- haldata->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT + 2);
- haldata->RegCR_1 = rtw_read8(Adapter, REG_CR + 1);
+ res = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL + 2, &haldata->RegFwHwTxQCtrl);
+ if (res)
+ return res;
+
+ res = rtw_read8(Adapter, REG_TBTT_PROHIBIT + 2, &haldata->RegReg542);
+ if (res)
+ return res;
+
+ res = rtw_read8(Adapter, REG_CR + 1, &haldata->RegCR_1);
+ if (res)
+ return res;
+
+ return 0;
}
static void _BeaconFunctionEnable(struct adapter *Adapter,
@@ -484,11 +533,17 @@
static void _InitAntenna_Selection(struct adapter *Adapter)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
+ int res;
+ u32 reg;
if (haldata->AntDivCfg == 0)
return;
- rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0) | BIT(23));
+ res = rtw_read32(Adapter, REG_LEDCFG0, ®);
+ if (res)
+ return;
+
+ rtw_write32(Adapter, REG_LEDCFG0, reg | BIT(23));
rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
if (rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
@@ -514,9 +569,11 @@
u16 value16;
u8 txpktbuf_bndy;
u32 status = _SUCCESS;
+ int res;
struct hal_data_8188e *haldata = &Adapter->haldata;
struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+ u32 reg;
if (Adapter->pwrctrlpriv.bkeepfwalive) {
if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
@@ -614,13 +671,19 @@
/* Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
/* */
/* Enable MACTXEN/MACRXEN block */
- value16 = rtw_read16(Adapter, REG_CR);
+ res = rtw_read16(Adapter, REG_CR, &value16);
+ if (res)
+ return _FAIL;
+
value16 |= (MACTXEN | MACRXEN);
rtw_write8(Adapter, REG_CR, value16);
/* Enable TX Report */
/* Enable Tx Report Timer */
- value8 = rtw_read8(Adapter, REG_TX_RPT_CTRL);
+ res = rtw_read8(Adapter, REG_TX_RPT_CTRL, &value8);
+ if (res)
+ return _FAIL;
+
rtw_write8(Adapter, REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
/* Set MAX RPT MACID */
rtw_write8(Adapter, REG_TX_RPT_CTRL + 1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
@@ -684,7 +747,11 @@
rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
/* enable tx DMA to drop the redundate data of packet */
- rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
+ res = rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK, &value16);
+ if (res)
+ return _FAIL;
+
+ rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (value16 | DROP_DATA_EN));
/* 2010/08/26 MH Merge from 8192CE. */
if (pwrctrlpriv->rf_pwrstate == rf_on) {
@@ -704,7 +771,11 @@
rtw_write8(Adapter, REG_USB_HRPWM, 0);
/* ack for xmit mgmt frames. */
- rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
+ res = rtw_read32(Adapter, REG_FWHW_TXQ_CTRL, ®);
+ if (res)
+ return _FAIL;
+
+ rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, reg | BIT(12));
exit:
return status;
@@ -714,23 +785,33 @@
{
u8 val8;
struct hal_data_8188e *haldata = &Adapter->haldata;
+ int res;
/* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
- val8 = rtw_read8(Adapter, REG_TX_RPT_CTRL);
+ res = rtw_read8(Adapter, REG_TX_RPT_CTRL, &val8);
+ if (res)
+ return;
+
rtw_write8(Adapter, REG_TX_RPT_CTRL, val8 & (~BIT(1)));
/* stop rx */
rtw_write8(Adapter, REG_CR, 0x0);
/* Run LPS WL RFOFF flow */
- HalPwrSeqCmdParsing(Adapter, Rtl8188E_NIC_LPS_ENTER_FLOW);
+ HalPwrSeqCmdParsing(Adapter, LPS_ENTER_FLOW);
/* 2. 0x1F[7:0] = 0 turn off RF */
- val8 = rtw_read8(Adapter, REG_MCUFWDL);
+ res = rtw_read8(Adapter, REG_MCUFWDL, &val8);
+ if (res)
+ return;
+
if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
/* Reset MCU 0x2[10]=0. */
- val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1);
+ res = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1, &val8);
+ if (res)
+ return;
+
val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */
rtw_write8(Adapter, REG_SYS_FUNC_EN + 1, val8);
}
@@ -740,26 +821,45 @@
/* YJ,add,111212 */
/* Disable 32k */
- val8 = rtw_read8(Adapter, REG_32K_CTRL);
+ res = rtw_read8(Adapter, REG_32K_CTRL, &val8);
+ if (res)
+ return;
+
rtw_write8(Adapter, REG_32K_CTRL, val8 & (~BIT(0)));
/* Card disable power action flow */
- HalPwrSeqCmdParsing(Adapter, Rtl8188E_NIC_DISABLE_FLOW);
+ HalPwrSeqCmdParsing(Adapter, DISABLE_FLOW);
/* Reset MCU IO Wrapper */
- val8 = rtw_read8(Adapter, REG_RSV_CTRL + 1);
+ res = rtw_read8(Adapter, REG_RSV_CTRL + 1, &val8);
+ if (res)
+ return;
+
rtw_write8(Adapter, REG_RSV_CTRL + 1, (val8 & (~BIT(3))));
- val8 = rtw_read8(Adapter, REG_RSV_CTRL + 1);
+
+ res = rtw_read8(Adapter, REG_RSV_CTRL + 1, &val8);
+ if (res)
+ return;
+
rtw_write8(Adapter, REG_RSV_CTRL + 1, val8 | BIT(3));
/* YJ,test add, 111207. For Power Consumption. */
- val8 = rtw_read8(Adapter, GPIO_IN);
+ res = rtw_read8(Adapter, GPIO_IN, &val8);
+ if (res)
+ return;
+
rtw_write8(Adapter, GPIO_OUT, val8);
rtw_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
- val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL);
+ res = rtw_read8(Adapter, REG_GPIO_IO_SEL, &val8);
+ if (res)
+ return;
+
rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8 << 4));
- val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL + 1);
+ res = rtw_read8(Adapter, REG_GPIO_IO_SEL + 1, &val8);
+ if (res)
+ return;
+
rtw_write8(Adapter, REG_GPIO_IO_SEL + 1, val8 | 0x0F);/* Reg0x43 */
rtw_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
haldata->bMacPwrCtrlOn = false;
@@ -812,13 +912,10 @@
static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
{
- u16 i;
- u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
struct eeprom_priv *eeprom = &adapt->eeprompriv;
if (AutoLoadFail) {
- for (i = 0; i < 6; i++)
- eeprom->mac_addr[i] = sMacAddr[i];
+ eth_random_addr(eeprom->mac_addr);
} else {
/* Read Permanent MAC address */
memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
@@ -829,285 +926,41 @@
{
struct eeprom_priv *eeprom = &Adapter->eeprompriv;
struct led_priv *ledpriv = &Adapter->ledpriv;
+ u8 *efuse_buf;
u8 eeValue;
+ int res;
/* check system boot selection */
- eeValue = rtw_read8(Adapter, REG_9346CR);
- eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM);
+ res = rtw_read8(Adapter, REG_9346CR, &eeValue);
+ if (res)
+ return;
+
eeprom->bautoload_fail_flag = !(eeValue & EEPROM_EN);
- if (!is_boot_from_eeprom(Adapter))
- EFUSE_ShadowMapUpdate(Adapter);
+ efuse_buf = kmalloc(EFUSE_MAP_LEN_88E, GFP_KERNEL);
+ if (!efuse_buf)
+ return;
+ memset(efuse_buf, 0xFF, EFUSE_MAP_LEN_88E);
+
+ if (!(eeValue & BOOT_FROM_EEPROM) && !eeprom->bautoload_fail_flag) {
+ rtl8188e_EfusePowerSwitch(Adapter, true);
+ rtl8188e_ReadEFuse(Adapter, EFUSE_MAP_LEN_88E, efuse_buf);
+ rtl8188e_EfusePowerSwitch(Adapter, false);
+ }
/* parse the eeprom/efuse content */
- Hal_EfuseParseIDCode88E(Adapter, eeprom->efuse_eeprom_data);
- Hal_EfuseParseMACAddr_8188EU(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
+ Hal_EfuseParseIDCode88E(Adapter, efuse_buf);
+ Hal_EfuseParseMACAddr_8188EU(Adapter, efuse_buf, eeprom->bautoload_fail_flag);
- Hal_ReadPowerSavingMode88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
- Hal_ReadTxPowerInfo88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
- rtl8188e_EfuseParseChnlPlan(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
- Hal_EfuseParseXtal_8188E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
- Hal_ReadAntennaDiversity88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
- Hal_ReadThermalMeter_88E(Adapter, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
+ Hal_ReadPowerSavingMode88E(Adapter, efuse_buf, eeprom->bautoload_fail_flag);
+ Hal_ReadTxPowerInfo88E(Adapter, efuse_buf, eeprom->bautoload_fail_flag);
+ rtl8188e_EfuseParseChnlPlan(Adapter, efuse_buf, eeprom->bautoload_fail_flag);
+ Hal_EfuseParseXtal_8188E(Adapter, efuse_buf, eeprom->bautoload_fail_flag);
+ Hal_ReadAntennaDiversity88E(Adapter, efuse_buf, eeprom->bautoload_fail_flag);
+ Hal_ReadThermalMeter_88E(Adapter, efuse_buf, eeprom->bautoload_fail_flag);
ledpriv->bRegUseLed = true;
-}
-
-static void ResumeTxBeacon(struct adapter *adapt)
-{
- struct hal_data_8188e *haldata = &adapt->haldata;
-
- /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
- /* which should be read from register to a global variable. */
-
- rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) | BIT(6));
- haldata->RegFwHwTxQCtrl |= BIT(6);
- rtw_write8(adapt, REG_TBTT_PROHIBIT + 1, 0xff);
- haldata->RegReg542 |= BIT(0);
- rtw_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
-}
-
-static void StopTxBeacon(struct adapter *adapt)
-{
- struct hal_data_8188e *haldata = &adapt->haldata;
-
- /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
- /* which should be read from register to a global variable. */
-
- rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
- haldata->RegFwHwTxQCtrl &= (~BIT(6));
- rtw_write8(adapt, REG_TBTT_PROHIBIT + 1, 0x64);
- haldata->RegReg542 &= ~(BIT(0));
- rtw_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
-
- /* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */
-}
-
-static void hw_var_set_opmode(struct adapter *Adapter, u8 *val)
-{
- u8 val8;
- u8 mode = *((u8 *)val);
-
- /* disable Port0 TSF update */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | BIT(4));
-
- /* set net_type */
- val8 = rtw_read8(Adapter, MSR) & 0x0c;
- val8 |= mode;
- rtw_write8(Adapter, MSR, val8);
-
- if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
- StopTxBeacon(Adapter);
-
- rtw_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
- } else if (mode == _HW_STATE_ADHOC_) {
- ResumeTxBeacon(Adapter);
- rtw_write8(Adapter, REG_BCN_CTRL, 0x1a);
- } else if (mode == _HW_STATE_AP_) {
- ResumeTxBeacon(Adapter);
-
- rtw_write8(Adapter, REG_BCN_CTRL, 0x12);
-
- /* Set RCR */
- rtw_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
- /* enable to rx data frame */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
- /* enable to rx ps-poll */
- rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
-
- /* Beacon Control related register for first time */
- rtw_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */
-
- rtw_write8(Adapter, REG_ATIMWND, 0x0a); /* 10ms */
- rtw_write16(Adapter, REG_BCNTCFG, 0x00);
- rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
- rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
-
- /* reset TSF */
- rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
-
- /* BIT(3) - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
- rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
-
- /* enable BCN0 Function for if1 */
- /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
- rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | BIT(1)));
-
- /* dis BCN1 ATIM WND if if2 is station */
- rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
- }
-}
-
-void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
-{
- struct hal_data_8188e *haldata = &Adapter->haldata;
- struct dm_priv *pdmpriv = &haldata->dmpriv;
- struct odm_dm_struct *podmpriv = &haldata->odmpriv;
-
- switch (variable) {
- case HW_VAR_SET_OPMODE:
- hw_var_set_opmode(Adapter, val);
- break;
- case HW_VAR_BASIC_RATE:
- {
- u16 BrateCfg = 0;
- u8 RateIndex = 0;
-
- /* 2007.01.16, by Emily */
- /* Select RRSR (in Legacy-OFDM and CCK) */
- /* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
- /* We do not use other rates. */
- HalSetBrateCfg(Adapter, val, &BrateCfg);
-
- /* 2011.03.30 add by Luke Lee */
- /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
- /* because CCK 2M has poor TXEVM */
- /* CCK 5.5M & 11M ACK should be enabled for better performance */
-
- BrateCfg = (BrateCfg | 0xd) & 0x15d;
-
- BrateCfg |= 0x01; /* default enable 1M ACK rate */
- /* Set RRSR rate table. */
- rtw_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
- rtw_write8(Adapter, REG_RRSR + 1, (BrateCfg >> 8) & 0xff);
- rtw_write8(Adapter, REG_RRSR + 2, rtw_read8(Adapter, REG_RRSR + 2) & 0xf0);
-
- /* Set RTS initial rate */
- while (BrateCfg > 0x1) {
- BrateCfg = (BrateCfg >> 1);
- RateIndex++;
- }
- /* Ziv - Check */
- rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
- }
- break;
- case HW_VAR_CORRECT_TSF:
- {
- u64 tsf;
- struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
-
- tsf = pmlmeext->TSFValue - do_div(pmlmeext->TSFValue,
- pmlmeinfo->bcn_interval * 1024) - 1024; /* us */
-
- if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
- StopTxBeacon(Adapter);
-
- /* disable related TSF function */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) & (~BIT(3)));
-
- rtw_write32(Adapter, REG_TSFTR, tsf);
- rtw_write32(Adapter, REG_TSFTR + 4, tsf >> 32);
-
- /* enable related TSF function */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | BIT(3));
-
- if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
- ResumeTxBeacon(Adapter);
- }
- break;
- case HW_VAR_MLME_SITESURVEY:
- if (*((u8 *)val)) { /* under sitesurvey */
- /* config RCR to receive different BSSID & not to receive data frame */
- u32 v = rtw_read32(Adapter, REG_RCR);
- v &= ~(RCR_CBSSID_BCN);
- rtw_write32(Adapter, REG_RCR, v);
- /* reject all data frame */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0x00);
-
- /* disable update TSF */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | BIT(4));
- } else { /* sitesurvey done */
- struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
-
- if ((is_client_associated_to_ap(Adapter)) ||
- ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) {
- /* enable to rx data frame */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
-
- /* enable update TSF */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
- } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
- rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
- /* enable update TSF */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
- }
- rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) | RCR_CBSSID_BCN);
- }
- break;
- case HW_VAR_SLOT_TIME:
- {
- u8 u1bAIFS, aSifsTime;
- struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
-
- rtw_write8(Adapter, REG_SLOT, val[0]);
-
- if (pmlmeinfo->WMM_enable == 0) {
- if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
- aSifsTime = 10;
- else
- aSifsTime = 16;
-
- u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
-
- /* <Roger_EXP> Temporary removed, 2008.06.20. */
- rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
- rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
- rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
- rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
- }
- }
- break;
- case HW_VAR_DM_FLAG:
- podmpriv->SupportAbility = *((u8 *)val);
- break;
- case HW_VAR_DM_FUNC_OP:
- if (val[0])
- podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
- else
- podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
- break;
- case HW_VAR_DM_FUNC_RESET:
- podmpriv->SupportAbility = pdmpriv->InitODMFlag;
- break;
- case HW_VAR_DM_FUNC_CLR:
- podmpriv->SupportAbility = 0;
- break;
- case HW_VAR_AMPDU_FACTOR:
- {
- u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
- u8 FactorToSet;
- u8 *pRegToSet;
- u8 index = 0;
-
- pRegToSet = RegToSet_Normal; /* 0xb972a841; */
- FactorToSet = *((u8 *)val);
- if (FactorToSet <= 3) {
- FactorToSet = (1 << (FactorToSet + 2));
- if (FactorToSet > 0xf)
- FactorToSet = 0xf;
-
- for (index = 0; index < 4; index++) {
- if ((pRegToSet[index] & 0xf0) > (FactorToSet << 4))
- pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet << 4);
-
- if ((pRegToSet[index] & 0x0f) > FactorToSet)
- pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
-
- rtw_write8(Adapter, (REG_AGGLEN_LMT + index), pRegToSet[index]);
- }
- }
- }
- break;
- case HW_VAR_H2C_MEDIA_STATUS_RPT:
- rtl8188e_set_FwMediaStatus_cmd(Adapter, (*(__le16 *)val));
- break;
- default:
- break;
- }
-
+ kfree(efuse_buf);
}
void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
@@ -1190,6 +1043,8 @@
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
u32 bcn_ctrl_reg = REG_BCN_CTRL;
+ int res;
+ u8 reg;
/* reset TSF, enable update TSF, correcting TSF On Beacon */
/* BCN interval */
@@ -1200,7 +1055,10 @@
rtw_write8(adapt, REG_SLOT, 0x09);
- value32 = rtw_read32(adapt, REG_TCR);
+ res = rtw_read32(adapt, REG_TCR, &value32);
+ if (res)
+ return;
+
value32 &= ~TSFRST;
rtw_write32(adapt, REG_TCR, value32);
@@ -1213,9 +1071,13 @@
_BeaconFunctionEnable(adapt, true, true);
- ResumeTxBeacon(adapt);
+ rtw_resume_tx_beacon(adapt);
- rtw_write8(adapt, bcn_ctrl_reg, rtw_read8(adapt, bcn_ctrl_reg) | BIT(1));
+ res = rtw_read8(adapt, bcn_ctrl_reg, ®);
+ if (res)
+ return;
+
+ rtw_write8(adapt, bcn_ctrl_reg, reg | BIT(1));
}
void rtl8188eu_init_default_value(struct adapter *adapt)
diff --git a/drivers/staging/r8188eu/hal/usb_ops_linux.c b/drivers/staging/r8188eu/hal/usb_ops_linux.c
index d5e6745..c1a4d023 100644
--- a/drivers/staging/r8188eu/hal/usb_ops_linux.c
+++ b/drivers/staging/r8188eu/hal/usb_ops_linux.c
@@ -94,40 +94,47 @@
return status;
}
-u8 rtw_read8(struct adapter *adapter, u32 addr)
+int __must_check rtw_read8(struct adapter *adapter, u32 addr, u8 *data)
{
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
- u8 data;
- usb_read(intf, value, &data, 1);
-
- return data;
+ return usb_read(intf, value, data, 1);
}
-u16 rtw_read16(struct adapter *adapter, u32 addr)
+int __must_check rtw_read16(struct adapter *adapter, u32 addr, u16 *data)
{
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
- __le16 data;
+ __le16 le_data;
+ int res;
- usb_read(intf, value, &data, 2);
+ res = usb_read(intf, value, &le_data, 2);
+ if (res)
+ return res;
- return le16_to_cpu(data);
+ *data = le16_to_cpu(le_data);
+
+ return 0;
}
-u32 rtw_read32(struct adapter *adapter, u32 addr)
+int __must_check rtw_read32(struct adapter *adapter, u32 addr, u32 *data)
{
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
- __le32 data;
+ __le32 le_data;
+ int res;
- usb_read(intf, value, &data, 4);
+ res = usb_read(intf, value, &le_data, 4);
+ if (res)
+ return res;
- return le32_to_cpu(data);
+ *data = le32_to_cpu(le_data);
+
+ return 0;
}
int rtw_write8(struct adapter *adapter, u32 addr, u8 val)
diff --git a/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h b/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h
deleted file mode 100644
index e4c5b5d..0000000
--- a/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
-/* Copyright(c) 2007 - 2011 Realtek Corporation. */
-
-#ifndef __HAL8188EPWRSEQ_H__
-#define __HAL8188EPWRSEQ_H__
-
-#include "HalPwrSeqCmd.h"
-
-extern struct wl_pwr_cfg rtl8188E_power_on_flow[];
-extern struct wl_pwr_cfg rtl8188E_card_disable_flow[];
-extern struct wl_pwr_cfg rtl8188E_enter_lps_flow[];
-
-#endif /* __HAL8188EPWRSEQ_H__ */
diff --git a/drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h b/drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h
index 20d73ca..c571ad9 100644
--- a/drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h
+++ b/drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h
@@ -22,19 +22,6 @@
le32_to_cpu((*(__le32 *)(__rxstatusdesc + 16))
#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__rxstatusdesc) \
le32_to_cpu((*(__le32 *)(__rxstatusdesc + 20))
-
-#define GET_TX_REPORT_TYPE1_RERTY_0(__paddr) \
- le16_get_bits(*(__le16 *)__paddr, GENMASK(15, 0))
-#define GET_TX_REPORT_TYPE1_RERTY_1(__paddr) \
- LE_BITS_TO_1BYTE(__paddr + 2, 0, 8)
-#define GET_TX_REPORT_TYPE1_RERTY_2(__paddr) \
- LE_BITS_TO_1BYTE(__paddr + 3, 0, 8)
-#define GET_TX_REPORT_TYPE1_RERTY_3(__paddr) \
- LE_BITS_TO_1BYTE(__paddr + 4, 0, 8)
-#define GET_TX_REPORT_TYPE1_RERTY_4(__paddr) \
- LE_BITS_TO_1BYTE(__paddr + 5, 0, 8)
-#define GET_TX_REPORT_TYPE1_DROP_0(__paddr) \
- LE_BITS_TO_1BYTE(__paddr + 6, 0, 8)
/* End rate adaptive define */
int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm);
diff --git a/drivers/staging/r8188eu/include/HalPwrSeqCmd.h b/drivers/staging/r8188eu/include/HalPwrSeqCmd.h
index 49c02cc..0886300 100644
--- a/drivers/staging/r8188eu/include/HalPwrSeqCmd.h
+++ b/drivers/staging/r8188eu/include/HalPwrSeqCmd.h
@@ -6,54 +6,13 @@
#include "drv_types.h"
-/*---------------------------------------------*/
-/* 3 The value of cmd: 4 bits */
-/*---------------------------------------------*/
-
-#define PWR_CMD_WRITE 0x01
- /* offset: the read register offset */
- /* msk: the mask of the write bits */
- /* value: write value */
- /* note: driver shall implement this cmd by read & msk after write */
-
-#define PWR_CMD_POLLING 0x02
- /* offset: the read register offset */
- /* msk: the mask of the polled value */
- /* value: the value to be polled, masked by the msd field. */
- /* note: driver shall implement this cmd by */
- /* do{ */
- /* if ( (Read(offset) & msk) == (value & msk) ) */
- /* break; */
- /* } while (not timeout); */
-
-#define PWR_CMD_DELAY 0x03
- /* offset: the value to delay */
- /* msk: N/A */
- /* value: the unit of delay, 0: us, 1: ms */
-
-#define PWR_CMD_END 0x04
- /* offset: N/A */
- /* msk: N/A */
- /* value: N/A */
-
-enum pwrseq_cmd_delat_unit {
- PWRSEQ_DELAY_US,
- PWRSEQ_DELAY_MS,
+enum r8188eu_pwr_seq {
+ PWR_ON_FLOW,
+ DISABLE_FLOW,
+ LPS_ENTER_FLOW,
};
-struct wl_pwr_cfg {
- u16 offset;
- u8 cmd:4;
- u8 msk;
- u8 value;
-};
-
-#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
-#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
-#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
-#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
-
/* Prototype of protected function. */
-u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg PwrCfgCmd[]);
+u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq);
#endif
diff --git a/drivers/staging/r8188eu/include/basic_types.h b/drivers/staging/r8188eu/include/basic_types.h
deleted file mode 100644
index ffb2117..0000000
--- a/drivers/staging/r8188eu/include/basic_types.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
-/* Copyright(c) 2007 - 2011 Realtek Corporation. */
-
-#ifndef __BASIC_TYPES_H__
-#define __BASIC_TYPES_H__
-
-#include <linux/types.h>
-#define NDIS_OID uint
-
-typedef void (*proc_t)(void *);
-
-#define FIELD_OFFSET(s, field) ((ssize_t)&((s *)(0))->field)
-
-/* port from fw */
-/* TODO: Macros Below are Sync from SD7-Driver. It is necessary
- * to check correctness */
-
-/*
- * Call endian free function when
- * 1. Read/write packet content.
- * 2. Before write integer to IO.
- * 3. After read integer from IO.
-*/
-
-/* Convert little data endian to host ordering */
-#define EF1BYTE(_val) \
- ((u8)(_val))
-
-/* Create a bit mask */
-#define BIT_LEN_MASK_8(__bitlen) \
- (0xFF >> (8 - (__bitlen)))
-
-/*Description:
- * Return 4-byte value in host byte ordering from
- * 4-byte pointer in little-endian system.
- */
-#define LE_P1BYTE_TO_HOST_1BYTE(__pstart) \
- (EF1BYTE(*((u8 *)(__pstart))))
-
-/*Description:
-Translate subfield (continuous bits in little-endian) of 4-byte
-value to host byte ordering.*/
-#define LE_BITS_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
- ( \
- (LE_P1BYTE_TO_HOST_1BYTE(__pstart) >> (__bitoffset)) & \
- BIT_LEN_MASK_8(__bitlen) \
- )
-
-#define N_BYTE_ALIGMENT(__value, __aligment) ((__aligment == 1) ? \
- (__value) : (((__value + __aligment - 1) / __aligment) * __aligment))
-
-#endif /* __BASIC_TYPES_H__ */
diff --git a/drivers/staging/r8188eu/include/hal_com.h b/drivers/staging/r8188eu/include/hal_com.h
index 56ba356..d7e333f 100644
--- a/drivers/staging/r8188eu/include/hal_com.h
+++ b/drivers/staging/r8188eu/include/hal_com.h
@@ -131,9 +131,6 @@
#define REG_NOA_DESC_START 0x05E8
#define REG_NOA_DESC_COUNT 0x05EC
-#include "HalVerDef.h"
-void dump_chip_info(struct HAL_VERSION ChipVersion);
-
/* return the final channel plan decision */
u8 hal_com_get_channel_plan(struct adapter *padapter,
u8 hw_channel_plan,
diff --git a/drivers/staging/r8188eu/include/hal_intf.h b/drivers/staging/r8188eu/include/hal_intf.h
index a56f3d6..ab6856d 100644
--- a/drivers/staging/r8188eu/include/hal_intf.h
+++ b/drivers/staging/r8188eu/include/hal_intf.h
@@ -8,31 +8,15 @@
#include "drv_types.h"
#include "Hal8188EPhyCfg.h"
-enum hw_variables {
- HW_VAR_SET_OPMODE,
- HW_VAR_BASIC_RATE,
- HW_VAR_CORRECT_TSF,
- HW_VAR_MLME_SITESURVEY,
- HW_VAR_SLOT_TIME,
- HW_VAR_DM_FLAG,
- HW_VAR_DM_FUNC_OP,
- HW_VAR_DM_FUNC_RESET,
- HW_VAR_DM_FUNC_CLR,
- HW_VAR_AMPDU_FACTOR,
- HW_VAR_H2C_MEDIA_STATUS_RPT,
-};
-
typedef s32 (*c2h_id_filter)(u8 id);
-#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
-
void rtl8188eu_interface_configure(struct adapter *adapt);
void ReadAdapterInfo8188EU(struct adapter *Adapter);
void rtl8188eu_init_default_value(struct adapter *adapt);
void rtl8188e_SetHalODMVar(struct adapter *Adapter, void *pValue1, bool bSet);
u32 rtl8188eu_InitPowerOn(struct adapter *adapt);
void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 PwrState);
-void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf);
+void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _size_byte, u8 *pbuf);
void hal_notch_filter_8188e(struct adapter *adapter, bool enable);
@@ -44,8 +28,6 @@
unsigned int rtl8188eu_inirp_init(struct adapter *Adapter);
-void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val);
-
uint rtw_hal_init(struct adapter *padapter);
uint rtw_hal_deinit(struct adapter *padapter);
void rtw_hal_stop(struct adapter *padapter);
diff --git a/drivers/staging/r8188eu/include/ieee80211.h b/drivers/staging/r8188eu/include/ieee80211.h
index 15636a8..e7a4f8a 100644
--- a/drivers/staging/r8188eu/include/ieee80211.h
+++ b/drivers/staging/r8188eu/include/ieee80211.h
@@ -624,13 +624,6 @@
ACT_PUBLIC_MAX
};
-/* BACK action code */
-enum rtw_ieee80211_back_actioncode {
- RTW_WLAN_ACTION_ADDBA_REQ = 0,
- RTW_WLAN_ACTION_ADDBA_RESP = 1,
- RTW_WLAN_ACTION_DELBA = 2,
-};
-
#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs)
* 00:50:F2 */
#define WME_OUI_TYPE 2
diff --git a/drivers/staging/r8188eu/include/osdep_service.h b/drivers/staging/r8188eu/include/osdep_service.h
index f1a7036..72990a1 100644
--- a/drivers/staging/r8188eu/include/osdep_service.h
+++ b/drivers/staging/r8188eu/include/osdep_service.h
@@ -5,7 +5,6 @@
#define __OSDEP_SERVICE_H_
#include <linux/sched/signal.h>
-#include "basic_types.h"
#define _FAIL 0
#define _SUCCESS 1
@@ -77,8 +76,6 @@
spin_lock_init(&((q)->lock)); \
} while (0)
-void rtw_usleep_os(int us);
-
static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer)
{
return del_timer_sync(ptimer);
diff --git a/drivers/staging/r8188eu/include/rtl8188e_hal.h b/drivers/staging/r8188eu/include/rtl8188e_hal.h
index d2a069d..5cd62b2 100644
--- a/drivers/staging/r8188eu/include/rtl8188e_hal.h
+++ b/drivers/staging/r8188eu/include/rtl8188e_hal.h
@@ -26,11 +26,6 @@
#include "odm_RegConfig8188E.h"
#include "odm_RTL8188E.h"
-/* RTL8188E Power Configuration CMDs for USB/SDIO interfaces */
-#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
-#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
-#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
-
#define DRVINFO_SZ 4 /* unit is 8bytes */
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
diff --git a/drivers/staging/r8188eu/include/rtl8188e_spec.h b/drivers/staging/r8188eu/include/rtl8188e_spec.h
index ef42c4b..9e7b1f8 100644
--- a/drivers/staging/r8188eu/include/rtl8188e_spec.h
+++ b/drivers/staging/r8188eu/include/rtl8188e_spec.h
@@ -9,7 +9,6 @@
#define HAL_PS_TIMER_INT_DELAY 50 /* 50 microseconds */
#define HAL_92C_NAV_UPPER_UNIT 128 /* micro-second */
-#define MAC_ADDR_LEN 6
/* 8188E PKT_BUFF_ACCESS_CTRL value */
#define TXPKT_BUF_SELECT 0x69
#define RXPKT_BUF_SELECT 0xA5
@@ -427,12 +426,6 @@
#define MAX_MSS_DENSITY_2T 0x13
#define MAX_MSS_DENSITY_1T 0x0A
-/* EEPROM enable when set 1 */
-#define CmdEEPROM_En BIT(5)
-/* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 */
-#define CmdEERPOMSEL BIT(4)
-#define Cmd9346CR_9356SEL BIT(4)
-
/* 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) */
#define GPIOSEL_GPIO 0
#define GPIOSEL_ENBT BIT(5)
@@ -1059,142 +1052,6 @@
#define SCR_TXBCUSEDK BIT(6) /* Force Tx Bcast pkt Use Default Key */
#define SCR_RXBCUSEDK BIT(7) /* Force Rx Bcast pkt Use Default Key */
-/* RTL8188E SDIO Configuration */
-
-/* I/O bus domain address mapping */
-#define SDIO_LOCAL_BASE 0x10250000
-#define WLAN_IOREG_BASE 0x10260000
-#define FIRMWARE_FIFO_BASE 0x10270000
-#define TX_HIQ_BASE 0x10310000
-#define TX_MIQ_BASE 0x10320000
-#define TX_LOQ_BASE 0x10330000
-#define RX_RX0FF_BASE 0x10340000
-
-/* SDIO host local register space mapping. */
-#define SDIO_LOCAL_MSK 0x0FFF
-#define WLAN_IOREG_MSK 0x7FFF
-#define WLAN_FIFO_MSK 0x1FFF /* Aggregation Length[12:0] */
-#define WLAN_RX0FF_MSK 0x0003
-
-/* Without ref to the SDIO Device ID */
-#define SDIO_WITHOUT_REF_DEVICE_ID 0
-#define SDIO_LOCAL_DEVICE_ID 0 /* 0b[16], 000b[15:13] */
-#define WLAN_TX_HIQ_DEVICE_ID 4 /* 0b[16], 100b[15:13] */
-#define WLAN_TX_MIQ_DEVICE_ID 5 /* 0b[16], 101b[15:13] */
-#define WLAN_TX_LOQ_DEVICE_ID 6 /* 0b[16], 110b[15:13] */
-#define WLAN_RX0FF_DEVICE_ID 7 /* 0b[16], 111b[15:13] */
-#define WLAN_IOREG_DEVICE_ID 8 /* 1b[16] */
-
-/* SDIO Tx Free Page Index */
-#define HI_QUEUE_IDX 0
-#define MID_QUEUE_IDX 1
-#define LOW_QUEUE_IDX 2
-#define PUBLIC_QUEUE_IDX 3
-
-#define SDIO_MAX_TX_QUEUE 3 /* HIQ, MIQ and LOQ */
-#define SDIO_MAX_RX_QUEUE 1
-
-/* SDIO Tx Control */
-#define SDIO_REG_TX_CTRL 0x0000
-/* SDIO Host Interrupt Mask */
-#define SDIO_REG_HIMR 0x0014
-/* SDIO Host Interrupt Service Routine */
-#define SDIO_REG_HISR 0x0018
-/* HCI Current Power Mode */
-#define SDIO_REG_HCPWM 0x0019
-/* RXDMA Request Length */
-#define SDIO_REG_RX0_REQ_LEN 0x001C
-/* Free Tx Buffer Page */
-#define SDIO_REG_FREE_TXPG 0x0020
-/* HCI Current Power Mode 1 */
-#define SDIO_REG_HCPWM1 0x0024
-/* HCI Current Power Mode 2 */
-#define SDIO_REG_HCPWM2 0x0026
-/* HTSF Informaion */
-#define SDIO_REG_HTSFR_INFO 0x0030
-/* HCI Request Power Mode 1 */
-#define SDIO_REG_HRPWM1 0x0080
-/* HCI Request Power Mode 2 */
-#define SDIO_REG_HRPWM2 0x0082
-/* HCI Power Save Clock */
-#define SDIO_REG_HPS_CLKR 0x0084
-/* SDIO HCI Suspend Control */
-#define SDIO_REG_HSUS_CTRL 0x0086
-/* SDIO Host Extension Interrupt Mask Always */
-#define SDIO_REG_HIMR_ON 0x0090
-/* SDIO Host Extension Interrupt Status Always */
-#define SDIO_REG_HISR_ON 0x0091
-
-#define SDIO_HIMR_DISABLED 0
-
-/* RTL8188E SDIO Host Interrupt Mask Register */
-#define SDIO_HIMR_RX_REQUEST_MSK BIT(0)
-#define SDIO_HIMR_AVAL_MSK BIT(1)
-#define SDIO_HIMR_TXERR_MSK BIT(2)
-#define SDIO_HIMR_RXERR_MSK BIT(3)
-#define SDIO_HIMR_TXFOVW_MSK BIT(4)
-#define SDIO_HIMR_RXFOVW_MSK BIT(5)
-#define SDIO_HIMR_TXBCNOK_MSK BIT(6)
-#define SDIO_HIMR_TXBCNERR_MSK BIT(7)
-#define SDIO_HIMR_BCNERLY_INT_MSK BIT(16)
-#define SDIO_HIMR_C2HCMD_MSK BIT(17)
-#define SDIO_HIMR_CPWM1_MSK BIT(18)
-#define SDIO_HIMR_CPWM2_MSK BIT(19)
-#define SDIO_HIMR_HSISR_IND_MSK BIT(20)
-#define SDIO_HIMR_GTINT3_IND_MSK BIT(21)
-#define SDIO_HIMR_GTINT4_IND_MSK BIT(22)
-#define SDIO_HIMR_PSTIMEOUT_MSK BIT(23)
-#define SDIO_HIMR_OCPINT_MSK BIT(24)
-#define SDIO_HIMR_ATIMEND_MSK BIT(25)
-#define SDIO_HIMR_ATIMEND_E_MSK BIT(26)
-#define SDIO_HIMR_CTWEND_MSK BIT(27)
-
-/* RTL8188E SDIO Specific */
-#define SDIO_HIMR_MCU_ERR_MSK BIT(28)
-#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT(29)
-
-/* SDIO Host Interrupt Service Routine */
-#define SDIO_HISR_RX_REQUEST BIT(0)
-#define SDIO_HISR_AVAL BIT(1)
-#define SDIO_HISR_TXERR BIT(2)
-#define SDIO_HISR_RXERR BIT(3)
-#define SDIO_HISR_TXFOVW BIT(4)
-#define SDIO_HISR_RXFOVW BIT(5)
-#define SDIO_HISR_TXBCNOK BIT(6)
-#define SDIO_HISR_TXBCNERR BIT(7)
-#define SDIO_HISR_BCNERLY_INT BIT(16)
-#define SDIO_HISR_C2HCMD BIT(17)
-#define SDIO_HISR_CPWM1 BIT(18)
-#define SDIO_HISR_CPWM2 BIT(19)
-#define SDIO_HISR_HSISR_IND BIT(20)
-#define SDIO_HISR_GTINT3_IND BIT(21)
-#define SDIO_HISR_GTINT4_IND BIT(22)
-#define SDIO_HISR_PSTIME BIT(23)
-#define SDIO_HISR_OCPINT BIT(24)
-#define SDIO_HISR_ATIMEND BIT(25)
-#define SDIO_HISR_ATIMEND_E BIT(26)
-#define SDIO_HISR_CTWEND BIT(27)
-
-/* RTL8188E SDIO Specific */
-#define SDIO_HISR_MCU_ERR BIT(28)
-#define SDIO_HISR_TSF_BIT32_TOGGLE BIT(29)
-
-#define MASK_SDIO_HISR_CLEAR \
- (SDIO_HISR_TXERR | SDIO_HISR_RXERR | SDIO_HISR_TXFOVW |\
- SDIO_HISR_RXFOVW | SDIO_HISR_TXBCNOK | SDIO_HISR_TXBCNERR |\
- SDIO_HISR_C2HCMD | SDIO_HISR_CPWM1 | SDIO_HISR_CPWM2 |\
- SDIO_HISR_HSISR_IND | SDIO_HISR_GTINT3_IND | SDIO_HISR_GTINT4_IND |\
- SDIO_HISR_PSTIMEOUT | SDIO_HISR_OCPINT)
-
-/* SDIO HCI Suspend Control Register */
-#define HCI_RESUME_PWR_RDY BIT(1)
-#define HCI_SUS_CTRL BIT(0)
-
-/* SDIO Tx FIFO related */
-/* The number of Tx FIFO free page */
-#define SDIO_TX_FREE_PG_QUEUE 4
-#define SDIO_TX_FIFO_PAGE_SZ 128
-
/* 0xFE00h ~ 0xFE55h USB Configuration */
/* 2 USB Information (0xFE17) */
diff --git a/drivers/staging/r8188eu/include/rtw_eeprom.h b/drivers/staging/r8188eu/include/rtw_eeprom.h
index d8d48ace..94d735b1 100644
--- a/drivers/staging/r8188eu/include/rtw_eeprom.h
+++ b/drivers/staging/r8188eu/include/rtw_eeprom.h
@@ -7,19 +7,9 @@
#include "osdep_service.h"
#include "drv_types.h"
-#define HWSET_MAX_SIZE_512 512
-
struct eeprom_priv {
u8 bautoload_fail_flag;
u8 mac_addr[ETH_ALEN] __aligned(2); /* PermanentAddress */
- u8 EepromOrEfuse;
- u8 efuse_eeprom_data[HWSET_MAX_SIZE_512] __aligned(4);
};
-void eeprom_write16(struct adapter *padapter, u16 reg, u16 data);
-u16 eeprom_read16(struct adapter *padapter, u16 reg);
-void read_eeprom_content(struct adapter *padapter);
-void eeprom_read_sz(struct adapter *adapt, u16 reg, u8 *data, u32 sz);
-void read_eeprom_content_by_attrib(struct adapter *padapter);
-
#endif /* __RTL871X_EEPROM_H__ */
diff --git a/drivers/staging/r8188eu/include/rtw_efuse.h b/drivers/staging/r8188eu/include/rtw_efuse.h
index 2daf69f..3d688a0 100644
--- a/drivers/staging/r8188eu/include/rtw_efuse.h
+++ b/drivers/staging/r8188eu/include/rtw_efuse.h
@@ -8,6 +8,4 @@
void ReadEFuseByte(struct adapter *adapter, u16 _offset, u8 *pbuf);
-void EFUSE_ShadowMapUpdate(struct adapter *adapter);
-
#endif
diff --git a/drivers/staging/r8188eu/include/rtw_io.h b/drivers/staging/r8188eu/include/rtw_io.h
index 6910e2b..925c796 100644
--- a/drivers/staging/r8188eu/include/rtw_io.h
+++ b/drivers/staging/r8188eu/include/rtw_io.h
@@ -220,9 +220,9 @@
void _rtw_attrib_read(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void _rtw_attrib_write(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-u8 rtw_read8(struct adapter *adapter, u32 addr);
-u16 rtw_read16(struct adapter *adapter, u32 addr);
-u32 rtw_read32(struct adapter *adapter, u32 addr);
+int __must_check rtw_read8(struct adapter *adapter, u32 addr, u8 *data);
+int __must_check rtw_read16(struct adapter *adapter, u32 addr, u16 *data);
+int __must_check rtw_read32(struct adapter *adapter, u32 addr, u32 *data);
void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
u32 rtw_read_port(struct adapter *adapter, u8 *pmem);
void rtw_read_port_cancel(struct adapter *adapter);
@@ -283,7 +283,7 @@
void async_bus_io(struct io_queue *pio_q);
void bus_sync_io(struct io_queue *pio_q);
u32 _ioreq2rwmem(struct io_queue *pio_q);
-void dev_power_down(struct adapter * Adapter, u8 bpwrup);
+void dev_power_down(struct adapter *Adapter, u8 bpwrup);
#define PlatformEFIOWrite1Byte(_a,_b,_c) \
rtw_write8(_a,_b,_c)
diff --git a/drivers/staging/r8188eu/include/rtw_iol.h b/drivers/staging/r8188eu/include/rtw_iol.h
index fb88ebc1..099f5a0 100644
--- a/drivers/staging/r8188eu/include/rtw_iol.h
+++ b/drivers/staging/r8188eu/include/rtw_iol.h
@@ -41,22 +41,14 @@
void read_efuse_from_txpktbuf(struct adapter *adapter, int bcnhead,
u8 *content, u16 *size);
-int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr,
- u8 value, u8 mask);
-int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr,
- u16 value, u16 mask);
-int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr,
- u32 value, u32 mask);
-int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path,
- u16 addr, u32 value, u32 mask);
-#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value, mask) \
- _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value) ,(mask))
-#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value, mask) \
- _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value),(mask))
-#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value, mask) \
- _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), (mask))
-#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value, mask) \
- _rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value), (mask))
+int rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr,
+ u8 value, u8 mask);
+int rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr,
+ u16 value, u16 mask);
+int rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr,
+ u32 value, u32 mask);
+int rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path,
+ u16 addr, u32 value, u32 mask);
u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame);
diff --git a/drivers/staging/r8188eu/include/rtw_led.h b/drivers/staging/r8188eu/include/rtw_led.h
index 2c14cb2..d6b0c1c 100644
--- a/drivers/staging/r8188eu/include/rtw_led.h
+++ b/drivers/staging/r8188eu/include/rtw_led.h
@@ -37,9 +37,11 @@
LED_BLINK_RUNTOP = 13, /* Customized for RunTop */
};
-struct LED_871x {
+struct led_priv {
struct adapter *padapter;
+ bool bRegUseLed;
+
enum LED_STATE_871x CurrLedState; /* Current LED state. */
enum LED_STATE_871x BlinkingLedState; /* Next state for blinking,
* either RTW_LED_ON or RTW_LED_OFF are. */
@@ -58,11 +60,6 @@
struct delayed_work blink_work;
};
-struct led_priv{
- struct LED_871x SwLed0;
- bool bRegUseLed;
-};
-
void rtl8188eu_InitSwLeds(struct adapter *padapter);
void rtl8188eu_DeInitSwLeds(struct adapter *padapter);
diff --git a/drivers/staging/r8188eu/include/rtw_mlme_ext.h b/drivers/staging/r8188eu/include/rtw_mlme_ext.h
index 573d65b..343ce1c 100644
--- a/drivers/staging/r8188eu/include/rtw_mlme_ext.h
+++ b/drivers/staging/r8188eu/include/rtw_mlme_ext.h
@@ -424,6 +424,9 @@
int allocate_fw_sta_entry(struct adapter *padapter);
void flush_all_cam_entry(struct adapter *padapter);
+void rtw_mlme_under_site_survey(struct adapter *adapter);
+void rtw_mlme_site_survey_done(struct adapter *adapter);
+
void site_survey(struct adapter *padapter);
u8 collect_bss_info(struct adapter *padapter, struct recv_frame *precv_frame,
struct wlan_bssid_ex *bssid);
@@ -455,6 +458,7 @@
void update_IOT_info(struct adapter *padapter);
void update_capinfo(struct adapter *adapter, u16 updatecap);
void update_wireless_mode(struct adapter *padapter);
+void rtw_set_basic_rate(struct adapter *adapter, u8 *rates);
void update_tx_basic_rate(struct adapter *padapter, u8 modulation);
void update_bmc_sta_support_rate(struct adapter *padapter, u32 mac_id);
int update_sta_support_rate(struct adapter *padapter, u8 *pvar_ie,
@@ -468,8 +472,7 @@
void Update_RA_Entry(struct adapter *padapter, u32 mac_id);
void set_sta_rate(struct adapter *padapter, struct sta_info *psta);
-unsigned int receive_disconnect(struct adapter *padapter,
- unsigned char *macaddr, unsigned short reason);
+void receive_disconnect(struct adapter *padapter, unsigned char *macaddr, unsigned short reason);
unsigned char get_highest_rate_idx(u32 mask);
int support_short_GI(struct adapter *padapter, struct HT_caps_element *caps);
@@ -524,12 +527,13 @@
unsigned short reason);
int issue_deauth_ex(struct adapter *padapter, u8 *da, unsigned short reason,
int try_cnt, int wait_ms);
-void issue_action_BA(struct adapter *padapter, unsigned char *raddr,
- unsigned char action, unsigned short status);
+void issue_action_BA(struct adapter *padapter, unsigned char *raddr, u8 action, u16 status);
unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr);
unsigned int send_beacon(struct adapter *padapter);
bool get_beacon_valid_bit(struct adapter *adapter);
void clear_beacon_valid_bit(struct adapter *adapter);
+void rtw_resume_tx_beacon(struct adapter *adapt);
+void rtw_stop_tx_beacon(struct adapter *adapt);
void start_clnt_assoc(struct adapter *padapter);
void start_clnt_auth(struct adapter *padapter);
@@ -544,12 +548,8 @@
struct recv_frame *precv_frame);
unsigned int OnProbeRsp(struct adapter *padapter,
struct recv_frame *precv_frame);
-unsigned int DoReserved(struct adapter *padapter,
- struct recv_frame *precv_frame);
unsigned int OnBeacon(struct adapter *padapter,
struct recv_frame *precv_frame);
-unsigned int OnAtim(struct adapter *padapter,
- struct recv_frame *precv_frame);
unsigned int OnDisassoc(struct adapter *padapter,
struct recv_frame *precv_frame);
unsigned int OnAuth(struct adapter *padapter,
@@ -592,9 +592,6 @@
bool cckrates_included(unsigned char *rate, int ratelen);
bool cckratesonly_included(unsigned char *rate, int ratelen);
-void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len);
-void correct_TSF(struct adapter *padapter, struct mlme_ext_priv *pmlmeext);
-
struct cmd_hdl {
uint parmsize;
u8 (*h2cfuns)(struct adapter *padapter, u8 *pbuf);
diff --git a/drivers/staging/r8188eu/include/usb_ops_linux.h b/drivers/staging/r8188eu/include/usb_ops_linux.h
index 641f059..966688e 100644
--- a/drivers/staging/r8188eu/include/usb_ops_linux.h
+++ b/drivers/staging/r8188eu/include/usb_ops_linux.h
@@ -26,6 +26,4 @@
#define usb_read_interrupt_complete(purb, regs) \
usb_read_interrupt_complete(purb)
-unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr);
-
#endif
diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index 8dd280e..7f91dac 100644
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -687,12 +687,9 @@
enum ndis_802_11_network_infra networkType;
int ret = 0;
-
-
- if (_FAIL == rtw_pwr_wakeup(padapter)) {
- ret = -EPERM;
+ ret = rtw_pwr_wakeup(padapter);
+ if (ret)
goto exit;
- }
if (!padapter->hw_init_completed) {
ret = -EPERM;
@@ -931,12 +928,9 @@
struct wlan_network *pnetwork = NULL;
enum ndis_802_11_auth_mode authmode;
-
-
- if (_FAIL == rtw_pwr_wakeup(padapter)) {
- ret = -1;
+ ret = rtw_pwr_wakeup(padapter);
+ if (ret)
goto exit;
- }
if (!padapter->bup) {
ret = -1;
@@ -1049,10 +1043,9 @@
struct ndis_802_11_ssid ssid[RTW_SSID_SCAN_AMOUNT];
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
- if (_FAIL == rtw_pwr_wakeup(padapter)) {
- ret = -1;
+ ret = rtw_pwr_wakeup(padapter);
+ if (ret)
goto exit;
- }
if (padapter->bDriverStopped) {
ret = -1;
@@ -1252,10 +1245,9 @@
uint ret = 0, len;
- if (_FAIL == rtw_pwr_wakeup(padapter)) {
- ret = -1;
+ ret = rtw_pwr_wakeup(padapter);
+ if (ret)
goto exit;
- }
if (!padapter->bup) {
ret = -1;
@@ -1593,7 +1585,7 @@
if (erq->length > 0) {
wep.KeyLength = erq->length <= 5 ? 5 : 13;
- wep.Length = wep.KeyLength + FIELD_OFFSET(struct ndis_802_11_wep, KeyMaterial);
+ wep.Length = wep.KeyLength + offsetof(struct ndis_802_11_wep, KeyMaterial);
} else {
wep.KeyLength = 0;
@@ -3126,18 +3118,29 @@
static void mac_reg_dump(struct adapter *padapter)
{
int i, j = 1;
+ u32 reg;
+ int res;
+
pr_info("\n ======= MAC REG =======\n");
for (i = 0x0; i < 0x300; i += 4) {
if (j % 4 == 1)
pr_info("0x%02x", i);
- pr_info(" 0x%08x ", rtw_read32(padapter, i));
+
+ res = rtw_read32(padapter, i, ®);
+ if (!res)
+ pr_info(" 0x%08x ", reg);
+
if ((j++) % 4 == 0)
pr_info("\n");
}
for (i = 0x400; i < 0x800; i += 4) {
if (j % 4 == 1)
pr_info("0x%02x", i);
- pr_info(" 0x%08x ", rtw_read32(padapter, i));
+
+ res = rtw_read32(padapter, i, ®);
+ if (!res)
+ pr_info(" 0x%08x ", reg);
+
if ((j++) % 4 == 0)
pr_info("\n");
}
@@ -3145,13 +3148,18 @@
static void bb_reg_dump(struct adapter *padapter)
{
- int i, j = 1;
+ int i, j = 1, res;
+ u32 reg;
+
pr_info("\n ======= BB REG =======\n");
for (i = 0x800; i < 0x1000; i += 4) {
if (j % 4 == 1)
pr_info("0x%02x", i);
- pr_info(" 0x%08x ", rtw_read32(padapter, i));
+ res = rtw_read32(padapter, i, ®);
+ if (!res)
+ pr_info(" 0x%08x ", reg);
+
if ((j++) % 4 == 0)
pr_info("\n");
}
@@ -3178,6 +3186,7 @@
{
struct hal_data_8188e *haldata = &adapter->haldata;
struct odm_dm_struct *odmpriv = &haldata->odmpriv;
+ int res;
switch (dm_func) {
case 0:
@@ -3193,7 +3202,9 @@
if (!(odmpriv->SupportAbility & DYNAMIC_BB_DIG)) {
struct rtw_dig *digtable = &odmpriv->DM_DigTable;
- digtable->CurIGValue = rtw_read8(adapter, 0xc50);
+ res = rtw_read8(adapter, 0xc50, &digtable->CurIGValue);
+ (void)res;
+ /* FIXME: return an error to caller */
}
odmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
break;
@@ -3202,6 +3213,14 @@
}
}
+static void rtw_set_dm_func_flag(struct adapter *adapter, u32 odm_flag)
+{
+ struct hal_data_8188e *haldata = &adapter->haldata;
+ struct odm_dm_struct *odmpriv = &haldata->odmpriv;
+
+ odmpriv->SupportAbility = odm_flag;
+}
+
static int rtw_dbg_port(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
@@ -3329,8 +3348,9 @@
u16 reg = arg;
u16 start_value = 0;
u32 write_num = extra_arg;
- int i;
+ int i, res;
struct xmit_frame *xmit_frame;
+ u8 val8;
xmit_frame = rtw_IOL_accquire_xmit_frame(padapter);
if (!xmit_frame) {
@@ -3343,7 +3363,9 @@
if (rtl8188e_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0) != _SUCCESS)
ret = -EPERM;
- rtw_read8(padapter, reg);
+ /* FIXME: is this read necessary? */
+ res = rtw_read8(padapter, reg, &val8);
+ (void)res;
}
break;
@@ -3352,8 +3374,8 @@
u16 reg = arg;
u16 start_value = 200;
u32 write_num = extra_arg;
-
- int i;
+ u16 val16;
+ int i, res;
struct xmit_frame *xmit_frame;
xmit_frame = rtw_IOL_accquire_xmit_frame(padapter);
@@ -3367,7 +3389,9 @@
if (rtl8188e_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0) != _SUCCESS)
ret = -EPERM;
- rtw_read16(padapter, reg);
+ /* FIXME: is this read necessary? */
+ res = rtw_read16(padapter, reg, &val16);
+ (void)res;
}
break;
case 0x08: /* continuous write dword test */
@@ -3390,7 +3414,8 @@
if (rtl8188e_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0) != _SUCCESS)
ret = -EPERM;
- rtw_read32(padapter, reg);
+ /* FIXME: is this read necessary? */
+ ret = rtw_read32(padapter, reg, &write_num);
}
break;
}
@@ -3434,7 +3459,7 @@
case 0x06:
{
u32 ODMFlag = (u32)(0x0f & arg);
- SetHwReg8188EU(padapter, HW_VAR_DM_FLAG, (u8 *)(&ODMFlag));
+ rtw_set_dm_func_flag(padapter, ODMFlag);
}
break;
case 0x07:
diff --git a/drivers/staging/r8188eu/os_dep/os_intfs.c b/drivers/staging/r8188eu/os_dep/os_intfs.c
index 891c85b..cac9553 100644
--- a/drivers/staging/r8188eu/os_dep/os_intfs.c
+++ b/drivers/staging/r8188eu/os_dep/os_intfs.c
@@ -740,19 +740,32 @@
{
struct pwrctrl_priv *pwrpriv = &adapter->pwrctrlpriv;
u8 trycnt = 100;
+ int res;
+ u32 reg;
/* pause tx */
rtw_write8(adapter, REG_TXPAUSE, 0xff);
/* keep sn */
- adapter->xmitpriv.nqos_ssn = rtw_read16(adapter, REG_NQOS_SEQ);
+ /* FIXME: return an error to caller */
+ res = rtw_read16(adapter, REG_NQOS_SEQ, &adapter->xmitpriv.nqos_ssn);
+ if (res)
+ return;
if (!pwrpriv->bkeepfwalive) {
/* RX DMA stop */
+ res = rtw_read32(adapter, REG_RXPKT_NUM, ®);
+ if (res)
+ return;
+
rtw_write32(adapter, REG_RXPKT_NUM,
- (rtw_read32(adapter, REG_RXPKT_NUM) | RW_RELEASE_EN));
+ (reg | RW_RELEASE_EN));
do {
- if (!(rtw_read32(adapter, REG_RXPKT_NUM) & RXDMA_IDLE))
+ res = rtw_read32(adapter, REG_RXPKT_NUM, ®);
+ if (res)
+ continue;
+
+ if (!(reg & RXDMA_IDLE))
break;
} while (trycnt--);
diff --git a/drivers/staging/r8188eu/os_dep/osdep_service.c b/drivers/staging/r8188eu/os_dep/osdep_service.c
index 812acd5..3504a0a 100644
--- a/drivers/staging/r8188eu/os_dep/osdep_service.c
+++ b/drivers/staging/r8188eu/os_dep/osdep_service.c
@@ -42,14 +42,6 @@
Caller must check if the list is empty before calling rtw_list_delete
*/
-void rtw_usleep_os(int us)
-{
- if (1 < (us / 1000))
- msleep(1);
- else
- msleep((us / 1000) + 1);
-}
-
static const struct device_type wlan_type = {
.name = "wlan",
};
diff --git a/drivers/staging/r8188eu/os_dep/usb_intf.c b/drivers/staging/r8188eu/os_dep/usb_intf.c
index 68869c5..cc2b44f 100644
--- a/drivers/staging/r8188eu/os_dep/usb_intf.c
+++ b/drivers/staging/r8188eu/os_dep/usb_intf.c
@@ -372,7 +372,7 @@
free_adapter:
if (pnetdev)
rtw_free_netdev(pnetdev);
- else if (padapter)
+ else
vfree(padapter);
return NULL;
diff --git a/drivers/staging/r8188eu/os_dep/usb_ops_linux.c b/drivers/staging/r8188eu/os_dep/usb_ops_linux.c
index 0269e60..220e592 100644
--- a/drivers/staging/r8188eu/os_dep/usb_ops_linux.c
+++ b/drivers/staging/r8188eu/os_dep/usb_ops_linux.c
@@ -7,7 +7,7 @@
#include "../include/usb_ops_linux.h"
#include "../include/rtl8188e_recv.h"
-unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr)
+static unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr)
{
unsigned int pipe = 0, ep_num = 0;
struct usb_device *pusbd = pdvobj->pusbdev;
diff --git a/drivers/staging/r8188eu/os_dep/xmit_linux.c b/drivers/staging/r8188eu/os_dep/xmit_linux.c
index e430c64..91a1e4e 100644
--- a/drivers/staging/r8188eu/os_dep/xmit_linux.c
+++ b/drivers/staging/r8188eu/os_dep/xmit_linux.c
@@ -71,7 +71,7 @@
if (!pxmitbuf->pallocated_buf)
return _FAIL;
- pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((size_t)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ);
+ pxmitbuf->pbuf = (u8 *)ALIGN((size_t)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ);
pxmitbuf->dma_transfer_addr = 0;
pxmitbuf->pxmit_urb = usb_alloc_urb(0, GFP_KERNEL);
diff --git a/drivers/staging/rtl8192e/rtllib_tx.c b/drivers/staging/rtl8192e/rtllib_tx.c
index 37715af..42f81b2 100644
--- a/drivers/staging/rtl8192e/rtllib_tx.c
+++ b/drivers/staging/rtl8192e/rtllib_tx.c
@@ -205,30 +205,28 @@
struct rtllib_txb *txb;
int i;
- txb = kmalloc(sizeof(struct rtllib_txb) + (sizeof(u8 *) * nr_frags),
- gfp_mask);
+ txb = kzalloc(struct_size(txb, fragments, nr_frags), gfp_mask);
if (!txb)
return NULL;
- memset(txb, 0, sizeof(struct rtllib_txb));
txb->nr_frags = nr_frags;
txb->frag_size = cpu_to_le16(txb_size);
for (i = 0; i < nr_frags; i++) {
txb->fragments[i] = dev_alloc_skb(txb_size);
- if (unlikely(!txb->fragments[i])) {
- i--;
- break;
- }
+ if (unlikely(!txb->fragments[i]))
+ goto err_free;
memset(txb->fragments[i]->cb, 0, sizeof(txb->fragments[i]->cb));
}
- if (unlikely(i != nr_frags)) {
- while (i >= 0)
- dev_kfree_skb_any(txb->fragments[i--]);
- kfree(txb);
- return NULL;
- }
+
return txb;
+
+err_free:
+ while (--i >= 0)
+ dev_kfree_skb_any(txb->fragments[i]);
+ kfree(txb);
+
+ return NULL;
}
static int rtllib_classify(struct sk_buff *skb, u8 bIsAmsdu)
diff --git a/drivers/staging/rtl8192e/rtllib_wx.c b/drivers/staging/rtl8192e/rtllib_wx.c
index cf9a240..da2c41c 100644
--- a/drivers/staging/rtl8192e/rtllib_wx.c
+++ b/drivers/staging/rtl8192e/rtllib_wx.c
@@ -17,17 +17,9 @@
#include <linux/module.h>
#include <linux/etherdevice.h>
#include "rtllib.h"
-struct modes_unit {
- char *mode_string;
- int mode_size;
-};
-static struct modes_unit rtllib_modes[] = {
- {"a", 1},
- {"b", 1},
- {"g", 1},
- {"?", 1},
- {"N-24G", 5},
- {"N-5G", 4},
+
+static const char * const rtllib_modes[] = {
+ "a", "b", "g", "?", "N-24G", "N-5G"
};
#define MAX_CUSTOM_LEN 64
@@ -72,10 +64,9 @@
/* Add the protocol name */
iwe.cmd = SIOCGIWNAME;
for (i = 0; i < ARRAY_SIZE(rtllib_modes); i++) {
- if (network->mode&(1<<i)) {
- sprintf(pname, rtllib_modes[i].mode_string,
- rtllib_modes[i].mode_size);
- pname += rtllib_modes[i].mode_size;
+ if (network->mode & BIT(i)) {
+ strcpy(pname, rtllib_modes[i]);
+ pname += strlen(rtllib_modes[i]);
}
}
*pname = '\0';
@@ -158,7 +149,8 @@
max_rate = rate;
}
iwe.cmd = SIOCGIWRATE;
- iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
+ iwe.u.bitrate.disabled = 0;
+ iwe.u.bitrate.fixed = 0;
iwe.u.bitrate.value = max_rate * 500000;
start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_PARAM_LEN);
iwe.cmd = IWEVCUSTOM;
@@ -285,7 +277,7 @@
struct iw_request_info *info,
union iwreq_data *wrqu, char *keybuf)
{
- struct iw_point *erq = &(wrqu->encoding);
+ struct iw_point *erq = &wrqu->encoding;
struct net_device *dev = ieee->dev;
struct rtllib_security sec = {
.flags = 0
@@ -312,8 +304,9 @@
netdev_dbg(ieee->dev,
"Disabling encryption on key %d.\n", key);
lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
- } else
+ } else {
netdev_dbg(ieee->dev, "Disabling encryption.\n");
+ }
/* Check all the keys to see if any are still configured,
* and if no key index was provided, de-init them all
@@ -457,7 +450,7 @@
struct iw_request_info *info,
union iwreq_data *wrqu, char *keybuf)
{
- struct iw_point *erq = &(wrqu->encoding);
+ struct iw_point *erq = &wrqu->encoding;
int len, key;
struct lib80211_crypt_data *crypt;
@@ -608,7 +601,6 @@
goto done;
}
*crypt = new_crypt;
-
}
if (ext->key_len > 0 && (*crypt)->ops->set_key &&
@@ -732,8 +724,9 @@
} else if (data->value & IW_AUTH_ALG_LEAP) {
ieee->open_wep = 1;
ieee->auth_mode = 2;
- } else
+ } else {
return -EINVAL;
+ }
break;
case IW_AUTH_WPA_ENABLED:
@@ -776,7 +769,7 @@
kfree(ieee->wps_ie);
ieee->wps_ie = NULL;
if (len) {
- if (len != ie[1]+2)
+ if (len != ie[1] + 2)
return -EINVAL;
buf = kmemdup(ie, len, GFP_KERNEL);
if (!buf)
diff --git a/drivers/staging/rtl8192u/r8192U.h b/drivers/staging/rtl8192u/r8192U.h
index 14ca00a..1942cb8 100644
--- a/drivers/staging/rtl8192u/r8192U.h
+++ b/drivers/staging/rtl8192u/r8192U.h
@@ -1013,7 +1013,7 @@
bool bis_any_nonbepkts;
bool bcurrent_turbo_EDCA;
bool bis_cur_rdlstate;
- struct timer_list fsync_timer;
+ struct delayed_work fsync_work;
bool bfsync_processing; /* 500ms Fsync timer is active or not */
u32 rate_record;
u32 rateCountDiffRecord;
diff --git a/drivers/staging/rtl8192u/r8192U_dm.c b/drivers/staging/rtl8192u/r8192U_dm.c
index 725bf5c..00fc8fd 100644
--- a/drivers/staging/rtl8192u/r8192U_dm.c
+++ b/drivers/staging/rtl8192u/r8192U_dm.c
@@ -2578,19 +2578,20 @@
priv->ieee80211->fsync_seconddiff_ratethreshold = 200;
priv->ieee80211->fsync_state = Default_Fsync;
priv->framesyncMonitor = 1; /* current default 0xc38 monitor on */
- timer_setup(&priv->fsync_timer, dm_fsync_timer_callback, 0);
+ INIT_DELAYED_WORK(&priv->fsync_work, dm_fsync_work_callback);
}
static void dm_deInit_fsync(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- del_timer_sync(&priv->fsync_timer);
+ cancel_delayed_work_sync(&priv->fsync_work);
}
-void dm_fsync_timer_callback(struct timer_list *t)
+void dm_fsync_work_callback(struct work_struct *work)
{
- struct r8192_priv *priv = from_timer(priv, t, fsync_timer);
+ struct r8192_priv *priv =
+ container_of(work, struct r8192_priv, fsync_work.work);
struct net_device *dev = priv->ieee80211->dev;
u32 rate_index, rate_count = 0, rate_count_diff = 0;
bool bSwitchFromCountDiff = false;
@@ -2657,17 +2658,16 @@
}
}
if (bDoubleTimeInterval) {
- if (timer_pending(&priv->fsync_timer))
- del_timer_sync(&priv->fsync_timer);
- priv->fsync_timer.expires = jiffies +
- msecs_to_jiffies(priv->ieee80211->fsync_time_interval*priv->ieee80211->fsync_multiple_timeinterval);
- add_timer(&priv->fsync_timer);
+ cancel_delayed_work_sync(&priv->fsync_work);
+ schedule_delayed_work(&priv->fsync_work,
+ msecs_to_jiffies(priv
+ ->ieee80211->fsync_time_interval *
+ priv->ieee80211->fsync_multiple_timeinterval));
} else {
- if (timer_pending(&priv->fsync_timer))
- del_timer_sync(&priv->fsync_timer);
- priv->fsync_timer.expires = jiffies +
- msecs_to_jiffies(priv->ieee80211->fsync_time_interval);
- add_timer(&priv->fsync_timer);
+ cancel_delayed_work_sync(&priv->fsync_work);
+ schedule_delayed_work(&priv->fsync_work,
+ msecs_to_jiffies(priv
+ ->ieee80211->fsync_time_interval));
}
} else {
/* Let Register return to default value; */
@@ -2695,7 +2695,7 @@
struct r8192_priv *priv = ieee80211_priv(dev);
RT_TRACE(COMP_HALDM, "%s\n", __func__);
- del_timer_sync(&(priv->fsync_timer));
+ cancel_delayed_work_sync(&priv->fsync_work);
/* Let Register return to default value; */
if (priv->bswitch_fsync) {
@@ -2736,11 +2736,9 @@
if (priv->ieee80211->fsync_rate_bitmap & rateBitmap)
priv->rate_record += priv->stats.received_rate_histogram[1][rateIndex];
}
- if (timer_pending(&priv->fsync_timer))
- del_timer_sync(&priv->fsync_timer);
- priv->fsync_timer.expires = jiffies +
- msecs_to_jiffies(priv->ieee80211->fsync_time_interval);
- add_timer(&priv->fsync_timer);
+ cancel_delayed_work_sync(&priv->fsync_work);
+ schedule_delayed_work(&priv->fsync_work,
+ msecs_to_jiffies(priv->ieee80211->fsync_time_interval));
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
}
@@ -3002,7 +3000,7 @@
/* for initial tx rate */
/*priv->stats.last_packet_rate = read_nic_byte(dev, INITIAL_TX_RATE_REG);*/
read_nic_byte(dev, INITIAL_TX_RATE_REG, &ieee->softmac_stats.last_packet_rate);
- /* for tx tx retry count */
+ /* for tx retry count */
/*priv->stats.txretrycount = read_nic_dword(dev, TX_RETRY_COUNT_REG);*/
read_nic_dword(dev, TX_RETRY_COUNT_REG, &ieee->softmac_stats.txretrycount);
}
diff --git a/drivers/staging/rtl8192u/r8192U_dm.h b/drivers/staging/rtl8192u/r8192U_dm.h
index 0b2a1c6..2159018 100644
--- a/drivers/staging/rtl8192u/r8192U_dm.h
+++ b/drivers/staging/rtl8192u/r8192U_dm.h
@@ -166,7 +166,7 @@
void dm_init_edca_turbo(struct net_device *dev);
void dm_rf_operation_test_callback(unsigned long data);
void dm_rf_pathcheck_workitemcallback(struct work_struct *work);
-void dm_fsync_timer_callback(struct timer_list *t);
+void dm_fsync_work_callback(struct work_struct *work);
void dm_cck_txpower_adjust(struct net_device *dev, bool binch14);
void dm_shadow_init(struct net_device *dev);
void dm_initialize_txpower_tracking(struct net_device *dev);
diff --git a/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c b/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c
index 1bdbd09..f878b04 100644
--- a/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c
+++ b/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c
@@ -960,7 +960,7 @@
return _FAIL;
frame_type = GetFrameSubType(pframe);
- if (frame_type == WIFI_ASSOCREQ)
+ if (frame_type == WIFI_ASSOCREQ)
ie_offset = _ASOCREQ_IE_OFFSET_;
else /* WIFI_REASSOCREQ */
ie_offset = _REASOCREQ_IE_OFFSET_;
diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
index cf35125..cb6d287 100644
--- a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
+++ b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
@@ -366,9 +366,8 @@
int freq = (int)cur_network->network.configuration.ds_config;
struct ieee80211_channel *chan;
- if (pwdev->iftype != NL80211_IFTYPE_ADHOC) {
+ if (pwdev->iftype != NL80211_IFTYPE_ADHOC)
return;
- }
if (!rtw_cfg80211_check_bss(padapter)) {
struct wlan_bssid_ex *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network);
@@ -544,9 +543,8 @@
goto exit;
}
- if (wep_key_len > 0) {
+ if (wep_key_len > 0)
wep_key_len = wep_key_len <= 5 ? 5 : 13;
- }
if (psecuritypriv->bWepDefaultKeyIdxSet == 0) {
/* wep default key has not been set, so use this key index as default key. */
@@ -582,9 +580,8 @@
memcpy(grpkey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
psecuritypriv->dot118021XGrpPrivacy = _WEP40_;
- if (param->u.crypt.key_len == 13) {
+ if (param->u.crypt.key_len == 13)
psecuritypriv->dot118021XGrpPrivacy = _WEP104_;
- }
} else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
psecuritypriv->dot118021XGrpPrivacy = _TKIP_;
@@ -626,24 +623,16 @@
}
- if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) /* psk/802_1x */
- {
- if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
- {
- if (param->u.crypt.set_tx == 1) /* pairwise key */
- {
+ if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) { /* psk/802_1x */
+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
+ if (param->u.crypt.set_tx == 1) { /* pairwise key */
memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
- if (strcmp(param->u.crypt.alg, "WEP") == 0)
- {
+ if (strcmp(param->u.crypt.alg, "WEP") == 0) {
psta->dot118021XPrivacy = _WEP40_;
if (param->u.crypt.key_len == 13)
- {
psta->dot118021XPrivacy = _WEP104_;
- }
- }
- else if (strcmp(param->u.crypt.alg, "TKIP") == 0)
- {
+ } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
psta->dot118021XPrivacy = _TKIP_;
/* DEBUG_ERR("set key length :param->u.crypt.key_len =%d\n", param->u.crypt.key_len); */
@@ -653,14 +642,10 @@
psecuritypriv->busetkipkey = true;
- }
- else if (strcmp(param->u.crypt.alg, "CCMP") == 0)
- {
+ } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
psta->dot118021XPrivacy = _AES_;
- }
- else
- {
+ } else {
psta->dot118021XPrivacy = _NO_PRIVACY_;
}
@@ -670,21 +655,14 @@
psta->bpairwise_key_installed = true;
- }
- else/* group key??? */
- {
- if (strcmp(param->u.crypt.alg, "WEP") == 0)
- {
+ } else { /* group key??? */
+ if (strcmp(param->u.crypt.alg, "WEP") == 0) {
memcpy(grpkey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
psecuritypriv->dot118021XGrpPrivacy = _WEP40_;
if (param->u.crypt.key_len == 13)
- {
psecuritypriv->dot118021XGrpPrivacy = _WEP104_;
- }
- }
- else if (strcmp(param->u.crypt.alg, "TKIP") == 0)
- {
+ } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
psecuritypriv->dot118021XGrpPrivacy = _TKIP_;
memcpy(grpkey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
@@ -696,15 +674,11 @@
psecuritypriv->busetkipkey = true;
- }
- else if (strcmp(param->u.crypt.alg, "CCMP") == 0)
- {
+ } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
psecuritypriv->dot118021XGrpPrivacy = _AES_;
memcpy(grpkey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
- }
- else
- {
+ } else {
psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_;
}
@@ -717,8 +691,7 @@
rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx);
pbcmc_sta = rtw_get_bcmc_stainfo(padapter);
- if (pbcmc_sta)
- {
+ if (pbcmc_sta) {
pbcmc_sta->ieee8021x_blocked = false;
pbcmc_sta->dot118021XPrivacy = psecuritypriv->dot118021XGrpPrivacy;/* rx will use bmc_sta's dot118021XPrivacy */
}
@@ -746,20 +719,16 @@
param->u.crypt.err = 0;
param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
- if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len)
- {
+ if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) {
ret = -EINVAL;
goto exit;
}
if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
- param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff)
- {
+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
if (param->u.crypt.idx >= WEP_KEYS
- || param->u.crypt.idx >= BIP_MAX_KEYID
- )
- {
+ || param->u.crypt.idx >= BIP_MAX_KEYID) {
ret = -EINVAL;
goto exit;
}
@@ -770,19 +739,16 @@
}
}
- if (strcmp(param->u.crypt.alg, "WEP") == 0)
- {
+ if (strcmp(param->u.crypt.alg, "WEP") == 0) {
wep_key_idx = param->u.crypt.idx;
wep_key_len = param->u.crypt.key_len;
- if ((wep_key_idx >= WEP_KEYS) || (wep_key_len <= 0))
- {
+ if ((wep_key_idx >= WEP_KEYS) || (wep_key_len <= 0)) {
ret = -EINVAL;
goto exit;
}
- if (psecuritypriv->bWepDefaultKeyIdxSet == 0)
- {
+ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) {
/* wep default key has not been set, so use this key index as default key. */
wep_key_len = wep_key_len <= 5 ? 5 : 13;
@@ -791,8 +757,7 @@
psecuritypriv->dot11PrivacyAlgrthm = _WEP40_;
psecuritypriv->dot118021XGrpPrivacy = _WEP40_;
- if (wep_key_len == 13)
- {
+ if (wep_key_len == 13) {
psecuritypriv->dot11PrivacyAlgrthm = _WEP104_;
psecuritypriv->dot118021XGrpPrivacy = _WEP104_;
}
@@ -809,13 +774,11 @@
goto exit;
}
- if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) /* 802_1x */
- {
+ if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { /* 802_1x */
struct sta_info *psta, *pbcmc_sta;
struct sta_priv *pstapriv = &padapter->stapriv;
- if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == true) /* sta mode */
- {
+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == true) { /* sta mode */
psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
if (psta) {
/* Jeff: don't disable ieee8021x_blocked while clearing key */
@@ -824,18 +787,15 @@
if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) ||
- (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled))
- {
+ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) {
psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm;
}
- if (param->u.crypt.set_tx == 1)/* pairwise key */
- {
+ if (param->u.crypt.set_tx == 1) { /* pairwise key */
memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
- if (strcmp(param->u.crypt.alg, "TKIP") == 0)/* set mic key */
- {
+ if (strcmp(param->u.crypt.alg, "TKIP") == 0) { /* set mic key */
/* DEBUG_ERR(("\nset key length :param->u.crypt.key_len =%d\n", param->u.crypt.key_len)); */
memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8);
memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8);
@@ -845,11 +805,8 @@
}
rtw_setstakey_cmd(padapter, psta, true, true);
- }
- else/* group key */
- {
- if (strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0)
- {
+ } else { /* group key */
+ if (strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) {
memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8);
memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8);
@@ -857,9 +814,7 @@
padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx;
rtw_set_key(padapter, &padapter->securitypriv, param->u.crypt.idx, 1, true);
- }
- else if (strcmp(param->u.crypt.alg, "BIP") == 0)
- {
+ } else if (strcmp(param->u.crypt.alg, "BIP") == 0) {
/* save the IGTK key, length 16 bytes */
memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
/*
@@ -873,25 +828,19 @@
}
pbcmc_sta = rtw_get_bcmc_stainfo(padapter);
- if (!pbcmc_sta)
- {
+ if (!pbcmc_sta) {
/* DEBUG_ERR(("Set OID_802_11_ADD_KEY: bcmc stainfo is null\n")); */
- }
- else
- {
+ } else {
/* Jeff: don't disable ieee8021x_blocked while clearing key */
if (strcmp(param->u.crypt.alg, "none") != 0)
pbcmc_sta->ieee8021x_blocked = false;
if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) ||
- (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled))
- {
+ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) {
pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm;
}
}
- }
- else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) /* adhoc mode */
- {
+ } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { /* adhoc mode */
}
}
@@ -949,39 +898,29 @@
if (!mac_addr || is_broadcast_ether_addr(mac_addr))
- {
param->u.crypt.set_tx = 0; /* for wpa/wpa2 group key */
- } else {
+ else
param->u.crypt.set_tx = 1; /* for wpa/wpa2 pairwise key */
- }
param->u.crypt.idx = key_index;
if (params->seq_len && params->seq)
- {
memcpy(param->u.crypt.seq, (u8 *)params->seq, params->seq_len);
- }
- if (params->key_len && params->key)
- {
+ if (params->key_len && params->key) {
param->u.crypt.key_len = params->key_len;
memcpy(param->u.crypt.key, (u8 *)params->key, params->key_len);
}
- if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true)
- {
+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) {
ret = rtw_cfg80211_set_encryption(ndev, param, param_len);
- }
- else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true)
- {
+ } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
if (mac_addr)
memcpy(param->sta_addr, (void *)mac_addr, ETH_ALEN);
ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len);
- }
- else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true
- || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true)
- {
+ } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true
+ || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true) {
ret = rtw_cfg80211_set_encryption(ndev, param, param_len);
}
@@ -1007,8 +946,7 @@
struct adapter *padapter = rtw_netdev_priv(ndev);
struct security_priv *psecuritypriv = &padapter->securitypriv;
- if (key_index == psecuritypriv->dot11PrivacyKeyIndex)
- {
+ if (key_index == psecuritypriv->dot11PrivacyKeyIndex) {
/* clear the flag of wep default key set. */
psecuritypriv->bWepDefaultKeyIdxSet = 0;
}
@@ -1024,16 +962,14 @@
struct adapter *padapter = rtw_netdev_priv(ndev);
struct security_priv *psecuritypriv = &padapter->securitypriv;
- if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) /* set wep default key */
- {
+ if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) { /* set wep default key */
psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled;
psecuritypriv->dot11PrivacyKeyIndex = key_index;
psecuritypriv->dot11PrivacyAlgrthm = _WEP40_;
psecuritypriv->dot118021XGrpPrivacy = _WEP40_;
- if (psecuritypriv->dot11DefKeylen[key_index] == 13)
- {
+ if (psecuritypriv->dot11DefKeylen[key_index] == 13) {
psecuritypriv->dot11PrivacyAlgrthm = _WEP104_;
psecuritypriv->dot118021XGrpPrivacy = _WEP104_;
}
@@ -1071,9 +1007,7 @@
/* for infra./P2PClient mode */
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)
- && check_fwstate(pmlmepriv, _FW_LINKED)
- )
- {
+ && check_fwstate(pmlmepriv, _FW_LINKED)) {
struct wlan_network *cur_network = &(pmlmepriv->cur_network);
if (memcmp((u8 *)mac, cur_network->network.mac_address, ETH_ALEN)) {
@@ -1099,9 +1033,7 @@
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)
|| check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)
|| check_fwstate(pmlmepriv, WIFI_AP_STATE))
- && check_fwstate(pmlmepriv, _FW_LINKED)
- )
- {
+ && check_fwstate(pmlmepriv, _FW_LINKED)) {
/* TODO: should acquire station info... */
}
@@ -1121,8 +1053,7 @@
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
int ret = 0;
- if (adapter_to_dvobj(padapter)->processing_dev_remove == true)
- {
+ if (adapter_to_dvobj(padapter)->processing_dev_remove == true) {
ret = -EPERM;
goto exit;
}
@@ -1141,8 +1072,7 @@
old_type = rtw_wdev->iftype;
- if (old_type != type)
- {
+ if (old_type != type) {
pmlmeext->action_public_rxseq = 0xffff;
pmlmeext->action_public_dialog_token = 0xff;
}
@@ -1164,8 +1094,7 @@
rtw_wdev->iftype = type;
- if (rtw_set_802_11_infrastructure_mode(padapter, networkType) == false)
- {
+ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) == false) {
rtw_wdev->iftype = old_type;
ret = -EPERM;
goto exit;
@@ -1230,9 +1159,7 @@
/* report network only if the current channel set contains the channel to which this network belongs */
if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.configuration.ds_config) >= 0
- && true == rtw_validate_ssid(&(pnetwork->network.ssid))
- )
- {
+ && true == rtw_validate_ssid(&(pnetwork->network.ssid))) {
/* ev =translate_scan(padapter, a, pnetwork, ev, stop); */
rtw_cfg80211_inform_bss(padapter, pnetwork);
}
@@ -1249,13 +1176,10 @@
u8 *wps_ie;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
- if (len > 0)
- {
+ if (len > 0) {
wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen);
- if (wps_ie)
- {
- if (pmlmepriv->wps_probe_req_ie)
- {
+ if (wps_ie) {
+ if (pmlmepriv->wps_probe_req_ie) {
pmlmepriv->wps_probe_req_ie_len = 0;
kfree(pmlmepriv->wps_probe_req_ie);
pmlmepriv->wps_probe_req_ie = NULL;
@@ -1307,10 +1231,8 @@
pwdev_priv->scan_request = request;
spin_unlock_bh(&pwdev_priv->scan_req_lock);
- if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true)
- {
- if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == true)
- {
+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == true) {
need_indicate_scan_done = true;
goto check_need_indicate_scan_done;
}
@@ -1333,15 +1255,13 @@
goto check_need_indicate_scan_done;
}
- if (pmlmepriv->LinkDetectInfo.bBusyTraffic == true)
- {
- static unsigned long lastscantime = 0;
+ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == true) {
+ static unsigned long lastscantime;
unsigned long passtime;
passtime = jiffies_to_msecs(jiffies - lastscantime);
lastscantime = jiffies;
- if (passtime > 12000)
- {
+ if (passtime > 12000) {
need_indicate_scan_done = true;
goto check_need_indicate_scan_done;
}
@@ -1380,9 +1300,7 @@
} else if (request->n_channels <= 4) {
for (j = request->n_channels - 1; j >= 0; j--)
for (i = 0; i < survey_times; i++)
- {
memcpy(&ch[j*survey_times+i], &ch[j], sizeof(struct rtw_ieee80211_channel));
- }
_status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, ch, survey_times * request->n_channels);
} else {
_status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, NULL, 0);
@@ -1391,14 +1309,11 @@
if (_status == false)
- {
ret = -1;
- }
check_need_indicate_scan_done:
kfree(ssid);
- if (need_indicate_scan_done)
- {
+ if (need_indicate_scan_done) {
rtw_cfg80211_surveydone_event_callback(padapter);
rtw_cfg80211_indicate_scan_done(padapter, false);
}
@@ -1424,9 +1339,7 @@
if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2))
- {
psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK;
- }
return 0;
@@ -1585,8 +1498,7 @@
if (pairwise_cipher == 0)
pairwise_cipher = WPA_CIPHER_NONE;
- switch (group_cipher)
- {
+ switch (group_cipher) {
case WPA_CIPHER_NONE:
padapter->securitypriv.dot118021XGrpPrivacy = _NO_PRIVACY_;
padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled;
@@ -1609,8 +1521,7 @@
break;
}
- switch (pairwise_cipher)
- {
+ switch (pairwise_cipher) {
case WPA_CIPHER_NONE:
padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_;
padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled;
@@ -1731,8 +1642,7 @@
rtw_wdev->iftype = NL80211_IFTYPE_STATION;
- if (rtw_set_802_11_infrastructure_mode(padapter, Ndis802_11Infrastructure) == false)
- {
+ if (rtw_set_802_11_infrastructure_mode(padapter, Ndis802_11Infrastructure) == false) {
rtw_wdev->iftype = old_type;
ret = -EPERM;
goto leave_ibss;
@@ -1792,9 +1702,8 @@
ret = -EBUSY;
goto exit;
}
- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) {
+ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true)
rtw_scan_abort(padapter);
- }
psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled;
psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_;
@@ -2288,9 +2197,8 @@
mon_ndev->ieee80211_ptr = mon_wdev;
ret = cfg80211_register_netdevice(mon_ndev);
- if (ret) {
+ if (ret)
goto out;
- }
*ndev = pwdev_priv->pmon_ndev = mon_ndev;
memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1);
@@ -2403,11 +2311,10 @@
rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, WLAN_EID_VENDOR_SPECIFIC, P2P_OUI, 4);
rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, WLAN_EID_VENDOR_SPECIFIC, WFD_OUI, 4);
- if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS) {
+ if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS)
ret = 0;
- } else {
+ else
ret = -EINVAL;
- }
kfree(pbuf);
diff --git a/drivers/staging/rts5208/spi.c b/drivers/staging/rts5208/spi.c
index f1e9e80..e88fe1a 100644
--- a/drivers/staging/rts5208/spi.c
+++ b/drivers/staging/rts5208/spi.c
@@ -460,10 +460,8 @@
spi->clk_div = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
spi->write_en = srb->cmnd[6];
- dev_dbg(rtsx_dev(chip), "%s: ", __func__);
- dev_dbg(rtsx_dev(chip), "spi_clock = %d, ", spi->spi_clock);
- dev_dbg(rtsx_dev(chip), "clk_div = %d, ", spi->clk_div);
- dev_dbg(rtsx_dev(chip), "write_en = %d\n", spi->write_en);
+ dev_dbg(rtsx_dev(chip), "spi_clock = %d, clk_div = %d, write_en = %d\n",
+ spi->spi_clock, spi->clk_div, spi->write_en);
return STATUS_SUCCESS;
}
diff --git a/drivers/staging/sm750fb/ddk750_dvi.c b/drivers/staging/sm750fb/ddk750_dvi.c
index 029d9ac..e0c7ff3 100644
--- a/drivers/staging/sm750fb/ddk750_dvi.c
+++ b/drivers/staging/sm750fb/ddk750_dvi.c
@@ -15,7 +15,7 @@
#ifdef DVI_CTRL_SII164
{
.init = sii164InitChip,
- .get_vendor_id = sii164GetVendorID,
+ .get_vendor_id = sii164_get_vendor_id,
.get_device_id = sii164GetDeviceID,
#ifdef SII164_FULL_FUNCTIONS
.reset_chip = sii164ResetChip,
diff --git a/drivers/staging/sm750fb/ddk750_power.h b/drivers/staging/sm750fb/ddk750_power.h
index 7002567..63c9e8b 100644
--- a/drivers/staging/sm750fb/ddk750_power.h
+++ b/drivers/staging/sm750fb/ddk750_power.h
@@ -15,7 +15,7 @@
}
void ddk750_set_dpms(enum dpms state);
-void sm750_set_power_mode(unsigned int powerMode);
+void sm750_set_power_mode(unsigned int mode);
void sm750_set_current_gate(unsigned int gate);
/*
diff --git a/drivers/staging/sm750fb/ddk750_sii164.c b/drivers/staging/sm750fb/ddk750_sii164.c
index 73e0e9f..3da1796 100644
--- a/drivers/staging/sm750fb/ddk750_sii164.c
+++ b/drivers/staging/sm750fb/ddk750_sii164.c
@@ -29,13 +29,13 @@
#endif
/*
- * sii164GetVendorID
+ * sii164_get_vendor_id
* This function gets the vendor ID of the DVI controller chip.
*
* Output:
* Vendor ID
*/
-unsigned short sii164GetVendorID(void)
+unsigned short sii164_get_vendor_id(void)
{
unsigned short vendorID;
@@ -140,7 +140,7 @@
#endif
/* Check if SII164 Chip exists */
- if ((sii164GetVendorID() == SII164_VENDOR_ID) &&
+ if ((sii164_get_vendor_id() == SII164_VENDOR_ID) &&
(sii164GetDeviceID() == SII164_DEVICE_ID)) {
/*
* Initialize SII164 controller chip.
diff --git a/drivers/staging/sm750fb/ddk750_sii164.h b/drivers/staging/sm750fb/ddk750_sii164.h
index d940cb7..ca330f6 100644
--- a/drivers/staging/sm750fb/ddk750_sii164.h
+++ b/drivers/staging/sm750fb/ddk750_sii164.h
@@ -27,7 +27,7 @@
unsigned char pllFilterEnable,
unsigned char pllFilterValue);
-unsigned short sii164GetVendorID(void);
+unsigned short sii164_get_vendor_id(void);
unsigned short sii164GetDeviceID(void);
#ifdef SII164_FULL_FUNCTIONS
diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c
index e429b33..f4c2c95 100644
--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c
+++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c
@@ -25,12 +25,14 @@
static void bcm2835_audio_lock(struct bcm2835_audio_instance *instance)
{
mutex_lock(&instance->vchi_mutex);
- vchiq_use_service(instance->service_handle);
+ vchiq_use_service(instance->alsa_stream->chip->vchi_ctx->instance,
+ instance->service_handle);
}
static void bcm2835_audio_unlock(struct bcm2835_audio_instance *instance)
{
- vchiq_release_service(instance->service_handle);
+ vchiq_release_service(instance->alsa_stream->chip->vchi_ctx->instance,
+ instance->service_handle);
mutex_unlock(&instance->vchi_mutex);
}
@@ -44,8 +46,8 @@
init_completion(&instance->msg_avail_comp);
}
- status = vchiq_queue_kernel_message(instance->service_handle,
- m, sizeof(*m));
+ status = vchiq_queue_kernel_message(instance->alsa_stream->chip->vchi_ctx->instance,
+ instance->service_handle, m, sizeof(*m));
if (status) {
dev_err(instance->dev,
"vchi message queue failed: %d, msg=%d\n",
@@ -89,11 +91,13 @@
return bcm2835_audio_send_msg(instance, &m, wait);
}
-static enum vchiq_status audio_vchi_callback(enum vchiq_reason reason,
+static enum vchiq_status audio_vchi_callback(struct vchiq_instance *vchiq_instance,
+ enum vchiq_reason reason,
struct vchiq_header *header,
unsigned int handle, void *userdata)
{
- struct bcm2835_audio_instance *instance = vchiq_get_service_userdata(handle);
+ struct bcm2835_audio_instance *instance = vchiq_get_service_userdata(vchiq_instance,
+ handle);
struct vc_audio_msg *m;
if (reason != VCHIQ_MESSAGE_AVAILABLE)
@@ -114,7 +118,7 @@
dev_err(instance->dev, "unexpected callback type=%d\n", m->type);
}
- vchiq_release_message(handle, header);
+ vchiq_release_message(vchiq_instance, instance->service_handle, header);
return VCHIQ_SUCCESS;
}
@@ -143,7 +147,8 @@
}
/* Finished with the service for now */
- vchiq_release_service(instance->service_handle);
+ vchiq_release_service(instance->alsa_stream->chip->vchi_ctx->instance,
+ instance->service_handle);
return 0;
}
@@ -153,10 +158,12 @@
int status;
mutex_lock(&instance->vchi_mutex);
- vchiq_use_service(instance->service_handle);
+ vchiq_use_service(instance->alsa_stream->chip->vchi_ctx->instance,
+ instance->service_handle);
/* Close all VCHI service connections */
- status = vchiq_close_service(instance->service_handle);
+ status = vchiq_close_service(instance->alsa_stream->chip->vchi_ctx->instance,
+ instance->service_handle);
if (status) {
dev_err(instance->dev,
"failed to close VCHI service connection (status=%d)\n",
@@ -226,7 +233,7 @@
goto deinit;
bcm2835_audio_lock(instance);
- vchiq_get_peer_version(instance->service_handle,
+ vchiq_get_peer_version(vchi_ctx->instance, instance->service_handle,
&instance->peer_version);
bcm2835_audio_unlock(instance);
if (instance->peer_version < 2 || force_bulk)
@@ -322,6 +329,8 @@
unsigned int size, void *src)
{
struct bcm2835_audio_instance *instance = alsa_stream->instance;
+ struct bcm2835_vchi_ctx *vchi_ctx = alsa_stream->chip->vchi_ctx;
+ struct vchiq_instance *vchiq_instance = vchi_ctx->instance;
struct vc_audio_msg m = {
.type = VC_AUDIO_MSG_TYPE_WRITE,
.write.count = size,
@@ -343,15 +352,14 @@
count = size;
if (!instance->max_packet) {
/* Send the message to the videocore */
- status = vchiq_bulk_transmit(instance->service_handle, src,
- count, NULL,
- VCHIQ_BULK_MODE_BLOCKING);
+ status = vchiq_bulk_transmit(vchiq_instance, instance->service_handle, src, count,
+ NULL, VCHIQ_BULK_MODE_BLOCKING);
} else {
while (count > 0) {
int bytes = min(instance->max_packet, count);
- status = vchiq_queue_kernel_message(instance->service_handle,
- src, bytes);
+ status = vchiq_queue_kernel_message(vchiq_instance,
+ instance->service_handle, src, bytes);
src += bytes;
count -= bytes;
}
diff --git a/drivers/staging/vc04_services/include/linux/raspberrypi/vchiq.h b/drivers/staging/vc04_services/include/linux/raspberrypi/vchiq.h
index c93f2f3..db1441c 100644
--- a/drivers/staging/vc04_services/include/linux/raspberrypi/vchiq.h
+++ b/drivers/staging/vc04_services/include/linux/raspberrypi/vchiq.h
@@ -53,9 +53,12 @@
unsigned int size;
};
+struct vchiq_instance;
+
struct vchiq_service_base {
int fourcc;
- enum vchiq_status (*callback)(enum vchiq_reason reason,
+ enum vchiq_status (*callback)(struct vchiq_instance *instance,
+ enum vchiq_reason reason,
struct vchiq_header *header,
unsigned int handle,
void *bulk_userdata);
@@ -71,7 +74,8 @@
struct vchiq_service_params_kernel {
int fourcc;
- enum vchiq_status (*callback)(enum vchiq_reason reason,
+ enum vchiq_status (*callback)(struct vchiq_instance *instance,
+ enum vchiq_reason reason,
struct vchiq_header *header,
unsigned int handle,
void *bulk_userdata);
@@ -88,23 +92,27 @@
extern enum vchiq_status vchiq_open_service(struct vchiq_instance *instance,
const struct vchiq_service_params_kernel *params,
unsigned int *pservice);
-extern enum vchiq_status vchiq_close_service(unsigned int service);
-extern enum vchiq_status vchiq_use_service(unsigned int service);
-extern enum vchiq_status vchiq_release_service(unsigned int service);
-extern void vchiq_msg_queue_push(unsigned int handle, struct vchiq_header *header);
-extern void vchiq_release_message(unsigned int service,
- struct vchiq_header *header);
-extern int vchiq_queue_kernel_message(unsigned int handle, void *data,
- unsigned int size);
-extern enum vchiq_status vchiq_bulk_transmit(unsigned int service,
- const void *data, unsigned int size, void *userdata,
- enum vchiq_bulk_mode mode);
-extern enum vchiq_status vchiq_bulk_receive(unsigned int service,
- void *data, unsigned int size, void *userdata,
- enum vchiq_bulk_mode mode);
-extern void *vchiq_get_service_userdata(unsigned int service);
-extern enum vchiq_status vchiq_get_peer_version(unsigned int handle,
- short *peer_version);
-extern struct vchiq_header *vchiq_msg_hold(unsigned int handle);
+extern enum vchiq_status vchiq_close_service(struct vchiq_instance *instance,
+ unsigned int service);
+extern enum vchiq_status vchiq_use_service(struct vchiq_instance *instance, unsigned int service);
+extern enum vchiq_status vchiq_release_service(struct vchiq_instance *instance,
+ unsigned int service);
+extern void vchiq_msg_queue_push(struct vchiq_instance *instance, unsigned int handle,
+ struct vchiq_header *header);
+extern void vchiq_release_message(struct vchiq_instance *instance, unsigned int service,
+ struct vchiq_header *header);
+extern int vchiq_queue_kernel_message(struct vchiq_instance *instance, unsigned int handle,
+ void *data, unsigned int size);
+extern enum vchiq_status vchiq_bulk_transmit(struct vchiq_instance *instance, unsigned int service,
+ const void *data, unsigned int size, void *userdata,
+ enum vchiq_bulk_mode mode);
+extern enum vchiq_status vchiq_bulk_receive(struct vchiq_instance *instance, unsigned int service,
+ void *data, unsigned int size, void *userdata,
+ enum vchiq_bulk_mode mode);
+extern void *vchiq_get_service_userdata(struct vchiq_instance *instance, unsigned int service);
+extern enum vchiq_status vchiq_get_peer_version(struct vchiq_instance *instance,
+ unsigned int handle,
+ short *peer_version);
+extern struct vchiq_header *vchiq_msg_hold(struct vchiq_instance *instance, unsigned int handle);
#endif /* VCHIQ_H */
diff --git a/drivers/staging/vc04_services/interface/TESTING b/drivers/staging/vc04_services/interface/TESTING
new file mode 100644
index 0000000..a6d63ef
--- /dev/null
+++ b/drivers/staging/vc04_services/interface/TESTING
@@ -0,0 +1,82 @@
+This document contains some hints to test the function of the VCHIQ driver
+without having additional hardware to the Raspberry Pi.
+
+* Requirements & limitations
+
+Testing the VCHIQ driver requires a Raspberry Pi with one of the following SoC:
+ - BCM2835 ( e.g. Raspberry Pi Zero W )
+ - BCM2836 ( e.g. Raspberry Pi 2 )
+ - BCM2837 ( e.g. Raspberry Pi 3 B+ )
+
+The BCM2711 used in the Raspberry Pi 4 is currently not supported in the
+mainline kernel.
+
+There are no specific requirements to the VideoCore firmware to get VCHIQ
+working.
+
+The test scenarios described in this document based on the tool vchiq_test.
+Its source code is available here: https://github.com/raspberrypi/userland
+
+* Configuration
+
+Here are the most common kernel configurations:
+
+ 1. BCM2835 target SoC (ARM 32 bit)
+
+ Just use bcm2835_defconfig which already has VCHIQ enabled.
+
+ 2. BCM2836/7 target SoC (ARM 32 bit)
+
+ Use the multi_v7_defconfig as a base and then enable all VCHIQ options.
+
+ 3. BCM2837 target SoC (ARM 64 bit)
+
+ Use the defconfig as a base and then enable all VCHIQ options.
+
+* Scenarios
+
+ * Initial test
+
+ Check the driver is probed and /dev/vchiq is created
+
+ * Functional test
+
+ Command: vchiq_test -f 10
+
+ Expected output:
+ Functional test - iters:10
+ ======== iteration 1 ========
+ Testing bulk transfer for alignment.
+ Testing bulk transfer at PAGE_SIZE.
+ ...
+
+ * Ping test
+
+ Command: vchiq_test -p 1
+
+ Expected output:
+ Ping test - service:echo, iters:1, version 3
+ vchi ping (size 0) -> 57.000000us
+ vchi ping (size 0, 0 async, 0 oneway) -> 122.000000us
+ vchi bulk (size 0, 0 async, 0 oneway) -> 546.000000us
+ vchi bulk (size 0, 0 oneway) -> 230.000000us
+ vchi ping (size 0) -> 49.000000us
+ vchi ping (size 0, 0 async, 0 oneway) -> 70.000000us
+ vchi bulk (size 0, 0 async, 0 oneway) -> 296.000000us
+ vchi bulk (size 0, 0 oneway) -> 266.000000us
+ vchi ping (size 0, 1 async, 0 oneway) -> 65.000000us
+ vchi bulk (size 0, 0 oneway) -> 456.000000us
+ vchi ping (size 0, 2 async, 0 oneway) -> 74.000000us
+ vchi bulk (size 0, 0 oneway) -> 640.000000us
+ vchi ping (size 0, 10 async, 0 oneway) -> 125.000000us
+ vchi bulk (size 0, 0 oneway) -> 2309.000000us
+ vchi ping (size 0, 0 async, 1 oneway) -> 70.000000us
+ vchi ping (size 0, 0 async, 2 oneway) -> 76.000000us
+ vchi ping (size 0, 0 async, 10 oneway) -> 105.000000us
+ vchi ping (size 0, 10 async, 10 oneway) -> 165.000000us
+ vchi ping (size 0, 100 async, 0 oneway) -> nanus
+ vchi bulk (size 0, 0 oneway) -> nanus
+ vchi ping (size 0, 0 async, 100 oneway) -> nanus
+ vchi ping (size 0, 100 async, 100 oneway) -> infus
+ vchi ping (size 0, 200 async, 0 oneway) -> infus
+ ...
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
index 0596ac6..dc33490b 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
@@ -148,12 +148,11 @@
static char *g_fragments_base;
static char *g_free_fragments;
static struct semaphore g_free_fragments_sema;
-static struct device *g_dev;
static DEFINE_SEMAPHORE(g_free_fragments_mutex);
static enum vchiq_status
-vchiq_blocking_bulk_transfer(unsigned int handle, void *data,
+vchiq_blocking_bulk_transfer(struct vchiq_instance *instance, unsigned int handle, void *data,
unsigned int size, enum vchiq_bulk_dir dir);
static irqreturn_t
@@ -175,17 +174,17 @@
}
static void
-cleanup_pagelistinfo(struct vchiq_pagelist_info *pagelistinfo)
+cleanup_pagelistinfo(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagelistinfo)
{
if (pagelistinfo->scatterlist_mapped) {
- dma_unmap_sg(g_dev, pagelistinfo->scatterlist,
+ dma_unmap_sg(instance->state->dev, pagelistinfo->scatterlist,
pagelistinfo->num_pages, pagelistinfo->dma_dir);
}
if (pagelistinfo->pages_need_release)
unpin_user_pages(pagelistinfo->pages, pagelistinfo->num_pages);
- dma_free_coherent(g_dev, pagelistinfo->pagelist_buffer_size,
+ dma_free_coherent(instance->state->dev, pagelistinfo->pagelist_buffer_size,
pagelistinfo->pagelist, pagelistinfo->dma_addr);
}
@@ -212,7 +211,7 @@
*/
static struct vchiq_pagelist_info *
-create_pagelist(char *buf, char __user *ubuf,
+create_pagelist(struct vchiq_instance *instance, char *buf, char __user *ubuf,
size_t count, unsigned short type)
{
struct pagelist *pagelist;
@@ -250,7 +249,7 @@
/* Allocate enough storage to hold the page pointers and the page
* list
*/
- pagelist = dma_alloc_coherent(g_dev, pagelist_size, &dma_addr,
+ pagelist = dma_alloc_coherent(instance->state->dev, pagelist_size, &dma_addr,
GFP_KERNEL);
vchiq_log_trace(vchiq_arm_log_level, "%s - %pK", __func__, pagelist);
@@ -292,7 +291,7 @@
size_t bytes = PAGE_SIZE - off;
if (!pg) {
- cleanup_pagelistinfo(pagelistinfo);
+ cleanup_pagelistinfo(instance, pagelistinfo);
return NULL;
}
@@ -315,7 +314,7 @@
/* This is probably due to the process being killed */
if (actual_pages > 0)
unpin_user_pages(pages, actual_pages);
- cleanup_pagelistinfo(pagelistinfo);
+ cleanup_pagelistinfo(instance, pagelistinfo);
return NULL;
}
/* release user pages */
@@ -338,13 +337,13 @@
count -= len;
}
- dma_buffers = dma_map_sg(g_dev,
+ dma_buffers = dma_map_sg(instance->state->dev,
scatterlist,
num_pages,
pagelistinfo->dma_dir);
if (dma_buffers == 0) {
- cleanup_pagelistinfo(pagelistinfo);
+ cleanup_pagelistinfo(instance, pagelistinfo);
return NULL;
}
@@ -378,7 +377,7 @@
char *fragments;
if (down_interruptible(&g_free_fragments_sema)) {
- cleanup_pagelistinfo(pagelistinfo);
+ cleanup_pagelistinfo(instance, pagelistinfo);
return NULL;
}
@@ -397,7 +396,7 @@
}
static void
-free_pagelist(struct vchiq_pagelist_info *pagelistinfo,
+free_pagelist(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagelistinfo,
int actual)
{
struct pagelist *pagelist = pagelistinfo->pagelist;
@@ -411,7 +410,7 @@
* NOTE: dma_unmap_sg must be called before the
* cpu can touch any of the data/pages.
*/
- dma_unmap_sg(g_dev, pagelistinfo->scatterlist,
+ dma_unmap_sg(instance->state->dev, pagelistinfo->scatterlist,
pagelistinfo->num_pages, pagelistinfo->dma_dir);
pagelistinfo->scatterlist_mapped = 0;
@@ -460,7 +459,7 @@
set_page_dirty(pages[i]);
}
- cleanup_pagelistinfo(pagelistinfo);
+ cleanup_pagelistinfo(instance, pagelistinfo);
}
int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state)
@@ -519,7 +518,7 @@
*(char **)&g_fragments_base[i * g_fragments_size] = NULL;
sema_init(&g_free_fragments_sema, MAX_FRAGMENTS);
- err = vchiq_init_state(state, vchiq_slot_zero);
+ err = vchiq_init_state(state, vchiq_slot_zero, dev);
if (err)
return err;
@@ -547,7 +546,6 @@
return err ? : -ENXIO;
}
- g_dev = dev;
vchiq_log_info(vchiq_arm_log_level, "vchiq_init - done (slots %pK, phys %pad)",
vchiq_slot_zero, &slot_phys);
@@ -604,6 +602,10 @@
void
remote_event_signal(struct remote_event *event)
{
+ /*
+ * Ensure that all writes to shared data structures have completed
+ * before signalling the peer.
+ */
wmb();
event->fired = 1;
@@ -615,12 +617,12 @@
}
int
-vchiq_prepare_bulk_data(struct vchiq_bulk *bulk, void *offset,
+vchiq_prepare_bulk_data(struct vchiq_instance *instance, struct vchiq_bulk *bulk, void *offset,
void __user *uoffset, int size, int dir)
{
struct vchiq_pagelist_info *pagelistinfo;
- pagelistinfo = create_pagelist(offset, uoffset, size,
+ pagelistinfo = create_pagelist(instance, offset, uoffset, size,
(dir == VCHIQ_BULK_RECEIVE)
? PAGELIST_READ
: PAGELIST_WRITE);
@@ -640,10 +642,10 @@
}
void
-vchiq_complete_bulk(struct vchiq_bulk *bulk)
+vchiq_complete_bulk(struct vchiq_instance *instance, struct vchiq_bulk *bulk)
{
if (bulk && bulk->remote_data && bulk->actual)
- free_pagelist((struct vchiq_pagelist_info *)bulk->remote_data,
+ free_pagelist(instance, (struct vchiq_pagelist_info *)bulk->remote_data,
bulk->actual);
}
@@ -821,7 +823,7 @@
*phandle = service->handle;
status = vchiq_open_service_internal(service, current->pid);
if (status != VCHIQ_SUCCESS) {
- vchiq_remove_service(service->handle);
+ vchiq_remove_service(instance, service->handle);
*phandle = VCHIQ_SERVICE_HANDLE_INVALID;
}
}
@@ -834,8 +836,8 @@
EXPORT_SYMBOL(vchiq_open_service);
enum vchiq_status
-vchiq_bulk_transmit(unsigned int handle, const void *data, unsigned int size,
- void *userdata, enum vchiq_bulk_mode mode)
+vchiq_bulk_transmit(struct vchiq_instance *instance, unsigned int handle, const void *data,
+ unsigned int size, void *userdata, enum vchiq_bulk_mode mode)
{
enum vchiq_status status;
@@ -843,13 +845,13 @@
switch (mode) {
case VCHIQ_BULK_MODE_NOCALLBACK:
case VCHIQ_BULK_MODE_CALLBACK:
- status = vchiq_bulk_transfer(handle,
+ status = vchiq_bulk_transfer(instance, handle,
(void *)data, NULL,
size, userdata, mode,
VCHIQ_BULK_TRANSMIT);
break;
case VCHIQ_BULK_MODE_BLOCKING:
- status = vchiq_blocking_bulk_transfer(handle, (void *)data, size,
+ status = vchiq_blocking_bulk_transfer(instance, handle, (void *)data, size,
VCHIQ_BULK_TRANSMIT);
break;
default:
@@ -871,8 +873,8 @@
}
EXPORT_SYMBOL(vchiq_bulk_transmit);
-enum vchiq_status vchiq_bulk_receive(unsigned int handle, void *data,
- unsigned int size, void *userdata,
+enum vchiq_status vchiq_bulk_receive(struct vchiq_instance *instance, unsigned int handle,
+ void *data, unsigned int size, void *userdata,
enum vchiq_bulk_mode mode)
{
enum vchiq_status status;
@@ -881,12 +883,12 @@
switch (mode) {
case VCHIQ_BULK_MODE_NOCALLBACK:
case VCHIQ_BULK_MODE_CALLBACK:
- status = vchiq_bulk_transfer(handle, data, NULL,
+ status = vchiq_bulk_transfer(instance, handle, data, NULL,
size, userdata,
mode, VCHIQ_BULK_RECEIVE);
break;
case VCHIQ_BULK_MODE_BLOCKING:
- status = vchiq_blocking_bulk_transfer(handle, (void *)data, size,
+ status = vchiq_blocking_bulk_transfer(instance, handle, (void *)data, size,
VCHIQ_BULK_RECEIVE);
break;
default:
@@ -909,20 +911,17 @@
EXPORT_SYMBOL(vchiq_bulk_receive);
static enum vchiq_status
-vchiq_blocking_bulk_transfer(unsigned int handle, void *data, unsigned int size,
- enum vchiq_bulk_dir dir)
+vchiq_blocking_bulk_transfer(struct vchiq_instance *instance, unsigned int handle, void *data,
+ unsigned int size, enum vchiq_bulk_dir dir)
{
- struct vchiq_instance *instance;
struct vchiq_service *service;
enum vchiq_status status;
struct bulk_waiter_node *waiter = NULL, *iter;
- service = find_service_by_handle(handle);
+ service = find_service_by_handle(instance, handle);
if (!service)
return VCHIQ_ERROR;
- instance = service->instance;
-
vchiq_service_put(service);
mutex_lock(&instance->bulk_waiter_list_mutex);
@@ -959,7 +958,7 @@
}
}
- status = vchiq_bulk_transfer(handle, data, NULL, size,
+ status = vchiq_bulk_transfer(instance, handle, data, NULL, size,
&waiter->bulk_waiter,
VCHIQ_BULK_MODE_BLOCKING, dir);
if ((status != VCHIQ_RETRY) || fatal_signal_pending(current) || !waiter->bulk_waiter.bulk) {
@@ -1046,8 +1045,8 @@
}
enum vchiq_status
-service_callback(enum vchiq_reason reason, struct vchiq_header *header,
- unsigned int handle, void *bulk_userdata)
+service_callback(struct vchiq_instance *instance, enum vchiq_reason reason,
+ struct vchiq_header *header, unsigned int handle, void *bulk_userdata)
{
/*
* How do we ensure the callback goes to the right client?
@@ -1057,7 +1056,6 @@
*/
struct user_service *user_service;
struct vchiq_service *service;
- struct vchiq_instance *instance;
bool skip_completion = false;
DEBUG_INITIALISE(g_state.local);
@@ -1065,14 +1063,13 @@
DEBUG_TRACE(SERVICE_CALLBACK_LINE);
rcu_read_lock();
- service = handle_to_service(handle);
+ service = handle_to_service(instance, handle);
if (WARN_ON(!service)) {
rcu_read_unlock();
return VCHIQ_SUCCESS;
}
user_service = (struct user_service *)service->base.userdata;
- instance = user_service->instance;
if (!instance || instance->closing) {
rcu_read_unlock();
@@ -1318,7 +1315,8 @@
*/
static enum vchiq_status
-vchiq_keepalive_vchiq_callback(enum vchiq_reason reason,
+vchiq_keepalive_vchiq_callback(struct vchiq_instance *instance,
+ enum vchiq_reason reason,
struct vchiq_header *header,
unsigned int service_user, void *bulk_user)
{
@@ -1387,14 +1385,14 @@
*/
while (uc--) {
atomic_inc(&arm_state->ka_use_ack_count);
- status = vchiq_use_service(ka_handle);
+ status = vchiq_use_service(instance, ka_handle);
if (status != VCHIQ_SUCCESS) {
vchiq_log_error(vchiq_susp_log_level,
"%s vchiq_use_service error %d", __func__, status);
}
}
while (rc--) {
- status = vchiq_release_service(ka_handle);
+ status = vchiq_release_service(instance, ka_handle);
if (status != VCHIQ_SUCCESS) {
vchiq_log_error(vchiq_susp_log_level,
"%s vchiq_release_service error %d", __func__,
@@ -1590,10 +1588,10 @@
}
enum vchiq_status
-vchiq_use_service(unsigned int handle)
+vchiq_use_service(struct vchiq_instance *instance, unsigned int handle)
{
enum vchiq_status ret = VCHIQ_ERROR;
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
if (service) {
ret = vchiq_use_internal(service->state, service, USE_TYPE_SERVICE);
@@ -1604,10 +1602,10 @@
EXPORT_SYMBOL(vchiq_use_service);
enum vchiq_status
-vchiq_release_service(unsigned int handle)
+vchiq_release_service(struct vchiq_instance *instance, unsigned int handle)
{
enum vchiq_status ret = VCHIQ_ERROR;
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
if (service) {
ret = vchiq_release_internal(service->state, service);
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h
index 2aa46b1..2851ef6 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h
@@ -86,10 +86,10 @@
vchiq_get_state(void);
enum vchiq_status
-vchiq_use_service(unsigned int handle);
+vchiq_use_service(struct vchiq_instance *instance, unsigned int handle);
extern enum vchiq_status
-vchiq_release_service(unsigned int handle);
+vchiq_release_service(struct vchiq_instance *instance, unsigned int handle);
extern enum vchiq_status
vchiq_check_service(struct vchiq_service *service);
@@ -138,8 +138,8 @@
#endif /* IS_ENABLED(CONFIG_VCHIQ_CDEV) */
extern enum vchiq_status
-service_callback(enum vchiq_reason reason, struct vchiq_header *header,
- unsigned int handle, void *bulk_userdata);
+service_callback(struct vchiq_instance *vchiq_instance, enum vchiq_reason reason,
+ struct vchiq_header *header, unsigned int handle, void *bulk_userdata);
extern void
free_bulk_waiter(struct vchiq_instance *instance);
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c
index 8f99272..45ed30b 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c
@@ -13,6 +13,7 @@
#include <linux/rcupdate.h>
#include <linux/sched/signal.h>
+#include "vchiq_arm.h"
#include "vchiq_core.h"
#define VCHIQ_SLOT_HANDLER_STACK 8192
@@ -161,7 +162,6 @@
DEFINE_SPINLOCK(bulk_waiter_spinlock);
static DEFINE_SPINLOCK(quota_spinlock);
-struct vchiq_state *vchiq_states[VCHIQ_MAX_STATES];
static unsigned int handle_seq;
static const char *const srvstate_names[] = {
@@ -234,13 +234,19 @@
service->srvstate = newstate;
}
+struct vchiq_service *handle_to_service(struct vchiq_instance *instance, unsigned int handle)
+{
+ int idx = handle & (VCHIQ_MAX_SERVICES - 1);
+
+ return rcu_dereference(instance->state->services[idx]);
+}
struct vchiq_service *
-find_service_by_handle(unsigned int handle)
+find_service_by_handle(struct vchiq_instance *instance, unsigned int handle)
{
struct vchiq_service *service;
rcu_read_lock();
- service = handle_to_service(handle);
+ service = handle_to_service(instance, handle);
if (service && service->srvstate != VCHIQ_SRVSTATE_FREE &&
service->handle == handle &&
kref_get_unless_zero(&service->ref_count)) {
@@ -281,7 +287,7 @@
struct vchiq_service *service;
rcu_read_lock();
- service = handle_to_service(handle);
+ service = handle_to_service(instance, handle);
if (service && service->srvstate != VCHIQ_SRVSTATE_FREE &&
service->handle == handle &&
service->instance == instance &&
@@ -302,7 +308,7 @@
struct vchiq_service *service;
rcu_read_lock();
- service = handle_to_service(handle);
+ service = handle_to_service(instance, handle);
if (service &&
(service->srvstate == VCHIQ_SRVSTATE_FREE ||
service->srvstate == VCHIQ_SRVSTATE_CLOSED) &&
@@ -398,26 +404,26 @@
}
int
-vchiq_get_client_id(unsigned int handle)
+vchiq_get_client_id(struct vchiq_instance *instance, unsigned int handle)
{
struct vchiq_service *service;
int id;
rcu_read_lock();
- service = handle_to_service(handle);
+ service = handle_to_service(instance, handle);
id = service ? service->client_id : 0;
rcu_read_unlock();
return id;
}
void *
-vchiq_get_service_userdata(unsigned int handle)
+vchiq_get_service_userdata(struct vchiq_instance *instance, unsigned int handle)
{
void *userdata;
struct vchiq_service *service;
rcu_read_lock();
- service = handle_to_service(handle);
+ service = handle_to_service(instance, handle);
userdata = service ? service->base.userdata : NULL;
rcu_read_unlock();
return userdata;
@@ -466,7 +472,8 @@
vchiq_log_trace(vchiq_core_log_level, "%d: callback:%d (%s, %pK, %pK)",
service->state->id, service->localport, reason_names[reason],
header, bulk_userdata);
- status = service->base.callback(reason, header, service->handle, bulk_userdata);
+ status = service->base.callback(service->instance, reason, header, service->handle,
+ bulk_userdata);
if (status == VCHIQ_ERROR) {
vchiq_log_warning(vchiq_core_log_level,
"%d: ignoring ERROR from callback to service %x",
@@ -475,7 +482,7 @@
}
if (reason != VCHIQ_MESSAGE_AVAILABLE)
- vchiq_release_message(service->handle, header);
+ vchiq_release_message(service->instance, service->handle, header);
return status;
}
@@ -521,6 +528,7 @@
return 0;
}
event->armed = 0;
+ /* Ensure that the peer sees that we are not waiting (armed == 0). */
wmb();
}
@@ -643,6 +651,7 @@
skip_service:
state->poll_needed = 1;
+ /* Ensure the slot handler thread sees the poll_needed flag. */
wmb();
/* ... and ensure the slot handler runs. */
@@ -1149,6 +1158,7 @@
remote_event_wait(&state->sync_release_event, &local->sync_release);
+ /* Ensure that reads don't overtake the remote_event_wait. */
rmb();
header = (struct vchiq_header *)SLOT_DATA_FROM_INDEX(state,
@@ -1441,7 +1451,7 @@
}
if (queue->process != queue->local_insert) {
- vchiq_complete_bulk(bulk);
+ vchiq_complete_bulk(service->instance, bulk);
vchiq_log_info(SRVTRACE_LEVEL(service),
"%s %c%c%c%c d:%d ABORTED - tx len:%d, rx len:%d",
@@ -1769,7 +1779,7 @@
DEBUG_TRACE(PARSE_LINE);
WARN_ON(queue->process == queue->local_insert);
- vchiq_complete_bulk(bulk);
+ vchiq_complete_bulk(service->instance, bulk);
queue->process++;
mutex_unlock(&service->bulk_mutex);
DEBUG_TRACE(PARSE_LINE);
@@ -1952,6 +1962,7 @@
DEBUG_TRACE(SLOT_HANDLER_LINE);
remote_event_wait(&state->trigger_event, &local->trigger);
+ /* Ensure that reads don't overtake the remote_event_wait. */
rmb();
DEBUG_TRACE(SLOT_HANDLER_LINE);
@@ -2014,6 +2025,7 @@
remote_event_wait(&state->sync_trigger_event, &local->sync_trigger);
+ /* Ensure that reads don't overtake the remote_event_wait. */
rmb();
msgid = header->msgid;
@@ -2142,18 +2154,13 @@
}
int
-vchiq_init_state(struct vchiq_state *state, struct vchiq_slot_zero *slot_zero)
+vchiq_init_state(struct vchiq_state *state, struct vchiq_slot_zero *slot_zero, struct device *dev)
{
struct vchiq_shared_state *local;
struct vchiq_shared_state *remote;
char threadname[16];
int i, ret;
- if (vchiq_states[0]) {
- pr_err("%s: VCHIQ state already initialized\n", __func__);
- return -EINVAL;
- }
-
local = &slot_zero->slave;
remote = &slot_zero->master;
@@ -2169,6 +2176,8 @@
memset(state, 0, sizeof(struct vchiq_state));
+ state->dev = dev;
+
/*
* initialize shared state pointers
*/
@@ -2272,8 +2281,6 @@
wake_up_process(state->recycle_thread);
wake_up_process(state->sync_thread);
- vchiq_states[0] = state;
-
/* Indicate readiness to the other side */
local->initialised = 1;
@@ -2287,9 +2294,10 @@
return ret;
}
-void vchiq_msg_queue_push(unsigned int handle, struct vchiq_header *header)
+void vchiq_msg_queue_push(struct vchiq_instance *instance, unsigned int handle,
+ struct vchiq_header *header)
{
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
int pos;
if (!service)
@@ -2309,9 +2317,9 @@
}
EXPORT_SYMBOL(vchiq_msg_queue_push);
-struct vchiq_header *vchiq_msg_hold(unsigned int handle)
+struct vchiq_header *vchiq_msg_hold(struct vchiq_instance *instance, unsigned int handle)
{
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
struct vchiq_header *header;
int pos;
@@ -2866,16 +2874,16 @@
/* Find all services registered to this client and remove them. */
i = 0;
while ((service = next_service_by_instance(state, instance, &i)) != NULL) {
- (void)vchiq_remove_service(service->handle);
+ (void)vchiq_remove_service(instance, service->handle);
vchiq_service_put(service);
}
}
enum vchiq_status
-vchiq_close_service(unsigned int handle)
+vchiq_close_service(struct vchiq_instance *instance, unsigned int handle)
{
/* Unregister the service */
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
enum vchiq_status status = VCHIQ_SUCCESS;
if (!service)
@@ -2930,10 +2938,10 @@
EXPORT_SYMBOL(vchiq_close_service);
enum vchiq_status
-vchiq_remove_service(unsigned int handle)
+vchiq_remove_service(struct vchiq_instance *instance, unsigned int handle)
{
/* Unregister the service */
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
enum vchiq_status status = VCHIQ_SUCCESS;
if (!service)
@@ -2996,11 +3004,11 @@
* When called in blocking mode, the userdata field points to a bulk_waiter
* structure.
*/
-enum vchiq_status vchiq_bulk_transfer(unsigned int handle, void *offset, void __user *uoffset,
- int size, void *userdata, enum vchiq_bulk_mode mode,
- enum vchiq_bulk_dir dir)
+enum vchiq_status vchiq_bulk_transfer(struct vchiq_instance *instance, unsigned int handle,
+ void *offset, void __user *uoffset, int size, void *userdata,
+ enum vchiq_bulk_mode mode, enum vchiq_bulk_dir dir)
{
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
struct vchiq_bulk_queue *queue;
struct vchiq_bulk *bulk;
struct vchiq_state *state;
@@ -3075,9 +3083,13 @@
bulk->size = size;
bulk->actual = VCHIQ_BULK_ACTUAL_ABORTED;
- if (vchiq_prepare_bulk_data(bulk, offset, uoffset, size, dir))
+ if (vchiq_prepare_bulk_data(instance, bulk, offset, uoffset, size, dir))
goto unlock_error_exit;
+ /*
+ * Ensure that the bulk data record is visible to the peer
+ * before proceeding.
+ */
wmb();
vchiq_log_info(vchiq_core_log_level, "%d: bt (%d->%d) %cx %x@%pad %pK",
@@ -3139,7 +3151,7 @@
unlock_both_error_exit:
mutex_unlock(&state->slot_mutex);
cancel_bulk_error_exit:
- vchiq_complete_bulk(bulk);
+ vchiq_complete_bulk(service->instance, bulk);
unlock_error_exit:
mutex_unlock(&service->bulk_mutex);
@@ -3150,13 +3162,13 @@
}
enum vchiq_status
-vchiq_queue_message(unsigned int handle,
+vchiq_queue_message(struct vchiq_instance *instance, unsigned int handle,
ssize_t (*copy_callback)(void *context, void *dest,
size_t offset, size_t maxsize),
void *context,
size_t size)
{
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
enum vchiq_status status = VCHIQ_ERROR;
int data_id;
@@ -3199,12 +3211,13 @@
return status;
}
-int vchiq_queue_kernel_message(unsigned int handle, void *data, unsigned int size)
+int vchiq_queue_kernel_message(struct vchiq_instance *instance, unsigned int handle, void *data,
+ unsigned int size)
{
enum vchiq_status status;
while (1) {
- status = vchiq_queue_message(handle, memcpy_copy_callback,
+ status = vchiq_queue_message(instance, handle, memcpy_copy_callback,
data, size);
/*
@@ -3223,10 +3236,10 @@
EXPORT_SYMBOL(vchiq_queue_kernel_message);
void
-vchiq_release_message(unsigned int handle,
+vchiq_release_message(struct vchiq_instance *instance, unsigned int handle,
struct vchiq_header *header)
{
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
struct vchiq_shared_state *remote;
struct vchiq_state *state;
int slot_index;
@@ -3265,10 +3278,10 @@
}
enum vchiq_status
-vchiq_get_peer_version(unsigned int handle, short *peer_version)
+vchiq_get_peer_version(struct vchiq_instance *instance, unsigned int handle, short *peer_version)
{
enum vchiq_status status = VCHIQ_ERROR;
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
if (!service)
goto exit;
@@ -3300,9 +3313,10 @@
}
int
-vchiq_set_service_option(unsigned int handle, enum vchiq_service_option option, int value)
+vchiq_set_service_option(struct vchiq_instance *instance, unsigned int handle,
+ enum vchiq_service_option option, int value)
{
- struct vchiq_service *service = find_service_by_handle(handle);
+ struct vchiq_service *service = find_service_by_handle(instance, handle);
struct vchiq_service_quota *quota;
int ret = -EINVAL;
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h
index 1ddc661..8b4a38f 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h
@@ -314,6 +314,7 @@
};
struct vchiq_state {
+ struct device *dev;
int id;
int initialised;
enum vchiq_connstate conn_state;
@@ -448,8 +449,6 @@
extern int vchiq_core_msg_log_level;
extern int vchiq_sync_log_level;
-extern struct vchiq_state *vchiq_states[VCHIQ_MAX_STATES];
-
extern const char *
get_conn_state_name(enum vchiq_connstate conn_state);
@@ -457,7 +456,7 @@
vchiq_init_slots(void *mem_base, int mem_size);
extern int
-vchiq_init_state(struct vchiq_state *state, struct vchiq_slot_zero *slot_zero);
+vchiq_init_state(struct vchiq_state *state, struct vchiq_slot_zero *slot_zero, struct device *dev);
extern enum vchiq_status
vchiq_connect_internal(struct vchiq_state *state, struct vchiq_instance *instance);
@@ -487,8 +486,8 @@
remote_event_pollall(struct vchiq_state *state);
extern enum vchiq_status
-vchiq_bulk_transfer(unsigned int handle, void *offset, void __user *uoffset,
- int size, void *userdata, enum vchiq_bulk_mode mode,
+vchiq_bulk_transfer(struct vchiq_instance *instance, unsigned int handle, void *offset,
+ void __user *uoffset, int size, void *userdata, enum vchiq_bulk_mode mode,
enum vchiq_bulk_dir dir);
extern int
@@ -507,20 +506,10 @@
request_poll(struct vchiq_state *state, struct vchiq_service *service,
int poll_type);
-static inline struct vchiq_service *
-handle_to_service(unsigned int handle)
-{
- int idx = handle & (VCHIQ_MAX_SERVICES - 1);
- struct vchiq_state *state = vchiq_states[(handle / VCHIQ_MAX_SERVICES) &
- (VCHIQ_MAX_STATES - 1)];
-
- if (!state)
- return NULL;
- return rcu_dereference(state->services[idx]);
-}
+struct vchiq_service *handle_to_service(struct vchiq_instance *instance, unsigned int handle);
extern struct vchiq_service *
-find_service_by_handle(unsigned int handle);
+find_service_by_handle(struct vchiq_instance *instance, unsigned int handle);
extern struct vchiq_service *
find_service_by_port(struct vchiq_state *state, unsigned int localport);
@@ -548,16 +537,16 @@
vchiq_service_put(struct vchiq_service *service);
extern enum vchiq_status
-vchiq_queue_message(unsigned int handle,
+vchiq_queue_message(struct vchiq_instance *instance, unsigned int handle,
ssize_t (*copy_callback)(void *context, void *dest,
size_t offset, size_t maxsize),
void *context,
size_t size);
-int vchiq_prepare_bulk_data(struct vchiq_bulk *bulk, void *offset, void __user *uoffset,
- int size, int dir);
+int vchiq_prepare_bulk_data(struct vchiq_instance *instance, struct vchiq_bulk *bulk, void *offset,
+ void __user *uoffset, int size, int dir);
-void vchiq_complete_bulk(struct vchiq_bulk *bulk);
+void vchiq_complete_bulk(struct vchiq_instance *instance, struct vchiq_bulk *bulk);
void remote_event_signal(struct remote_event *event);
@@ -595,12 +584,13 @@
void vchiq_log_dump_mem(const char *label, u32 addr, const void *void_mem, size_t num_bytes);
-enum vchiq_status vchiq_remove_service(unsigned int service);
+enum vchiq_status vchiq_remove_service(struct vchiq_instance *instance, unsigned int service);
-int vchiq_get_client_id(unsigned int service);
+int vchiq_get_client_id(struct vchiq_instance *instance, unsigned int service);
void vchiq_get_config(struct vchiq_config *config);
-int vchiq_set_service_option(unsigned int service, enum vchiq_service_option option, int value);
+int vchiq_set_service_option(struct vchiq_instance *instance, unsigned int service,
+ enum vchiq_service_option option, int value);
#endif
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c
index 66bbfec..7e29749 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c
@@ -108,8 +108,8 @@
}
static int
-vchiq_ioc_queue_message(unsigned int handle, struct vchiq_element *elements,
- unsigned long count)
+vchiq_ioc_queue_message(struct vchiq_instance *instance, unsigned int handle,
+ struct vchiq_element *elements, unsigned long count)
{
struct vchiq_io_copy_callback_context context;
enum vchiq_status status = VCHIQ_SUCCESS;
@@ -127,7 +127,7 @@
total_size += elements[i].size;
}
- status = vchiq_queue_message(handle, vchiq_ioc_copy_element_data,
+ status = vchiq_queue_message(instance, handle, vchiq_ioc_copy_element_data,
&context, total_size);
if (status == VCHIQ_ERROR)
@@ -191,7 +191,7 @@
if (args->is_open) {
status = vchiq_open_service_internal(service, instance->pid);
if (status != VCHIQ_SUCCESS) {
- vchiq_remove_service(service->handle);
+ vchiq_remove_service(instance, service->handle);
return (status == VCHIQ_RETRY) ?
-EINTR : -EIO;
}
@@ -266,7 +266,7 @@
/* Copy to user space if msgbuf is not NULL */
if (!args->buf || (copy_to_user(args->buf, header->data, header->size) == 0)) {
ret = header->size;
- vchiq_release_message(service->handle, header);
+ vchiq_release_message(instance, service->handle, header);
} else {
ret = -EFAULT;
}
@@ -330,7 +330,7 @@
userdata = args->userdata;
}
- status = vchiq_bulk_transfer(args->handle, NULL, args->data, args->size,
+ status = vchiq_bulk_transfer(instance, args->handle, NULL, args->data, args->size,
userdata, args->mode, dir);
if (!waiter) {
@@ -529,7 +529,7 @@
}
/* Now it has been copied, the message can be released. */
- vchiq_release_message(service->handle, header);
+ vchiq_release_message(instance, service->handle, header);
/* The completion must point to the msgbuf. */
user_completion.header = msgbuf;
@@ -596,7 +596,7 @@
i = 0;
while ((service = next_service_by_instance(instance->state,
instance, &i))) {
- status = vchiq_remove_service(service->handle);
+ status = vchiq_remove_service(instance, service->handle);
vchiq_service_put(service);
if (status != VCHIQ_SUCCESS)
break;
@@ -649,7 +649,7 @@
break;
if (put_user(args.handle, &argp->handle)) {
- vchiq_remove_service(args.handle);
+ vchiq_remove_service(instance, args.handle);
ret = -EFAULT;
}
} break;
@@ -673,8 +673,8 @@
*/
if (!user_service->close_pending) {
status = (cmd == VCHIQ_IOC_CLOSE_SERVICE) ?
- vchiq_close_service(service->handle) :
- vchiq_remove_service(service->handle);
+ vchiq_close_service(instance, service->handle) :
+ vchiq_remove_service(instance, service->handle);
if (status != VCHIQ_SUCCESS)
break;
}
@@ -731,7 +731,7 @@
if (copy_from_user(elements, args.elements,
args.count * sizeof(struct vchiq_element)) == 0)
- ret = vchiq_ioc_queue_message(args.handle, elements,
+ ret = vchiq_ioc_queue_message(instance, args.handle, elements,
args.count);
else
ret = -EFAULT;
@@ -788,7 +788,7 @@
case VCHIQ_IOC_GET_CLIENT_ID: {
unsigned int handle = (unsigned int)arg;
- ret = vchiq_get_client_id(handle);
+ ret = vchiq_get_client_id(instance, handle);
} break;
case VCHIQ_IOC_GET_CONFIG: {
@@ -827,7 +827,7 @@
break;
}
- ret = vchiq_set_service_option(args.handle, args.option,
+ ret = vchiq_set_service_option(instance, args.handle, args.option,
args.value);
} break;
@@ -908,6 +908,7 @@
{
struct vchiq_create_service args;
struct vchiq_create_service32 args32;
+ struct vchiq_instance *instance = file->private_data;
long ret;
if (copy_from_user(&args32, ptrargs32, sizeof(args32)))
@@ -926,12 +927,12 @@
.handle = args32.handle,
};
- ret = vchiq_ioc_create_service(file->private_data, &args);
+ ret = vchiq_ioc_create_service(instance, &args);
if (ret < 0)
return ret;
if (put_user(args.handle, &ptrargs32->handle)) {
- vchiq_remove_service(args.handle);
+ vchiq_remove_service(instance, args.handle);
return -EFAULT;
}
@@ -960,6 +961,7 @@
struct vchiq_queue_message args;
struct vchiq_queue_message32 args32;
struct vchiq_service *service;
+ struct vchiq_instance *instance = file->private_data;
int ret;
if (copy_from_user(&args32, arg, sizeof(args32)))
@@ -974,7 +976,7 @@
if (args32.count > MAX_ELEMENTS)
return -EINVAL;
- service = find_service_for_instance(file->private_data, args.handle);
+ service = find_service_for_instance(instance, args.handle);
if (!service)
return -EINVAL;
@@ -994,7 +996,7 @@
compat_ptr(element32[count].data);
elements[count].size = element32[count].size;
}
- ret = vchiq_ioc_queue_message(args.handle, elements,
+ ret = vchiq_ioc_queue_message(instance, args.handle, elements,
args.count);
} else {
ret = -EINVAL;
@@ -1261,7 +1263,7 @@
spin_unlock(&msg_queue_spinlock);
if (header)
- vchiq_release_message(service->handle, header);
+ vchiq_release_message(instance, service->handle, header);
spin_lock(&msg_queue_spinlock);
}
diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c
index 845b20e..cb921c9 100644
--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c
+++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c
@@ -292,8 +292,8 @@
/* Dummy receive to ensure the buffers remain in order */
len = 8;
/* queue the bulk submission */
- vchiq_use_service(instance->service_handle);
- ret = vchiq_bulk_receive(instance->service_handle,
+ vchiq_use_service(instance->vchiq_instance, instance->service_handle);
+ ret = vchiq_bulk_receive(instance->vchiq_instance, instance->service_handle,
msg_context->u.bulk.buffer->buffer,
/* Actual receive needs to be a multiple
* of 4 bytes
@@ -302,7 +302,7 @@
msg_context,
VCHIQ_BULK_MODE_CALLBACK);
- vchiq_release_service(instance->service_handle);
+ vchiq_release_service(instance->vchiq_instance, instance->service_handle);
if (ret != 0)
pr_err("%s: ctx: %p, vchiq_bulk_receive failed %d\n",
@@ -436,15 +436,15 @@
/* no payload in message */
m.u.buffer_from_host.payload_in_message = 0;
- vchiq_use_service(instance->service_handle);
+ vchiq_use_service(instance->vchiq_instance, instance->service_handle);
- ret = vchiq_queue_kernel_message(instance->service_handle, &m,
+ ret = vchiq_queue_kernel_message(instance->vchiq_instance, instance->service_handle, &m,
sizeof(struct mmal_msg_header) +
sizeof(m.u.buffer_from_host));
if (ret)
atomic_dec(&port->buffers_with_vpu);
- vchiq_release_service(instance->service_handle);
+ vchiq_release_service(instance->vchiq_instance, instance->service_handle);
return ret;
}
@@ -548,11 +548,12 @@
}
/* incoming event service callback */
-static enum vchiq_status service_callback(enum vchiq_reason reason,
+static enum vchiq_status service_callback(struct vchiq_instance *vchiq_instance,
+ enum vchiq_reason reason,
struct vchiq_header *header,
unsigned int handle, void *bulk_ctx)
{
- struct vchiq_mmal_instance *instance = vchiq_get_service_userdata(handle);
+ struct vchiq_mmal_instance *instance = vchiq_get_service_userdata(vchiq_instance, handle);
u32 msg_len;
struct mmal_msg *msg;
struct mmal_msg_context *msg_context;
@@ -572,25 +573,25 @@
/* handling is different for buffer messages */
switch (msg->h.type) {
case MMAL_MSG_TYPE_BUFFER_FROM_HOST:
- vchiq_release_message(handle, header);
+ vchiq_release_message(vchiq_instance, handle, header);
break;
case MMAL_MSG_TYPE_EVENT_TO_HOST:
event_to_host_cb(instance, msg, msg_len);
- vchiq_release_message(handle, header);
+ vchiq_release_message(vchiq_instance, handle, header);
break;
case MMAL_MSG_TYPE_BUFFER_TO_HOST:
buffer_to_host_cb(instance, msg, msg_len);
- vchiq_release_message(handle, header);
+ vchiq_release_message(vchiq_instance, handle, header);
break;
default:
/* messages dependent on header context to complete */
if (!msg->h.context) {
pr_err("received message context was null!\n");
- vchiq_release_message(handle, header);
+ vchiq_release_message(vchiq_instance, handle, header);
break;
}
@@ -599,7 +600,7 @@
if (!msg_context) {
pr_err("received invalid message context %u!\n",
msg->h.context);
- vchiq_release_message(handle, header);
+ vchiq_release_message(vchiq_instance, handle, header);
break;
}
@@ -678,13 +679,13 @@
DBG_DUMP_MSG(msg, (sizeof(struct mmal_msg_header) + payload_len),
">>> sync message");
- vchiq_use_service(instance->service_handle);
+ vchiq_use_service(instance->vchiq_instance, instance->service_handle);
- ret = vchiq_queue_kernel_message(instance->service_handle, msg,
+ ret = vchiq_queue_kernel_message(instance->vchiq_instance, instance->service_handle, msg,
sizeof(struct mmal_msg_header) +
payload_len);
- vchiq_release_service(instance->service_handle);
+ vchiq_release_service(instance->vchiq_instance, instance->service_handle);
if (ret) {
pr_err("error %d queuing message\n", ret);
@@ -824,7 +825,7 @@
port->component->handle, port->handle);
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -919,7 +920,7 @@
pr_debug("%s:result:%d component:0x%x port:%d\n",
__func__, ret, port->component->handle, port->handle);
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -967,7 +968,7 @@
component->inputs, component->outputs, component->clocks);
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1000,7 +1001,7 @@
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1032,7 +1033,7 @@
ret = -rmsg->u.component_enable_reply.status;
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1065,7 +1066,7 @@
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1097,7 +1098,7 @@
*minor_out = rmsg->u.version.minor;
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1139,7 +1140,7 @@
port_action_type_names[action_type], action_type);
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1187,7 +1188,7 @@
action_type, connect_component_handle, connect_port_handle);
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1228,7 +1229,7 @@
ret, port->component->handle, port->handle, parameter_id);
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1287,7 +1288,7 @@
ret, port->component->handle, port->handle, parameter_id);
release_msg:
- vchiq_release_message(instance->service_handle, rmsg_handle);
+ vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle);
return ret;
}
@@ -1832,9 +1833,9 @@
if (mutex_lock_interruptible(&instance->vchiq_mutex))
return -EINTR;
- vchiq_use_service(instance->service_handle);
+ vchiq_use_service(instance->vchiq_instance, instance->service_handle);
- status = vchiq_close_service(instance->service_handle);
+ status = vchiq_close_service(instance->vchiq_instance, instance->service_handle);
if (status != 0)
pr_err("mmal-vchiq: VCHIQ close failed\n");
@@ -1922,14 +1923,14 @@
goto err_close_services;
}
- vchiq_release_service(instance->service_handle);
+ vchiq_release_service(instance->vchiq_instance, instance->service_handle);
*out_instance = instance;
return 0;
err_close_services:
- vchiq_close_service(instance->service_handle);
+ vchiq_close_service(instance->vchiq_instance, instance->service_handle);
destroy_workqueue(instance->bulk_wq);
err_free:
kfree(instance);
diff --git a/drivers/staging/vme_user/Kconfig b/drivers/staging/vme_user/Kconfig
index e8b4461..c8eabf8f 100644
--- a/drivers/staging/vme_user/Kconfig
+++ b/drivers/staging/vme_user/Kconfig
@@ -1,4 +1,29 @@
# SPDX-License-Identifier: GPL-2.0
+menuconfig VME_BUS
+ bool "VME bridge support"
+ depends on STAGING && PCI
+ help
+ If you say Y here you get support for the VME bridge Framework.
+
+if VME_BUS
+
+comment "VME Bridge Drivers"
+
+config VME_TSI148
+ tristate "Tempe"
+ depends on HAS_DMA
+ help
+ If you say Y here you get support for the Tundra TSI148 VME bridge
+ chip.
+
+config VME_FAKE
+ tristate "Fake"
+ help
+ If you say Y here you get support for the fake VME bridge. This
+ provides a virtualised VME Bus for devices with no VME bridge. This
+ is mainly useful for VME development (in the absence of VME
+ hardware).
+
comment "VME Device Drivers"
config VME_USER
@@ -11,3 +36,5 @@
To compile this driver as a module, choose M here. The module will
be called vme_user. If unsure, say N.
+
+endif
diff --git a/drivers/staging/vme_user/Makefile b/drivers/staging/vme_user/Makefile
index 5380115..8dcc693 100644
--- a/drivers/staging/vme_user/Makefile
+++ b/drivers/staging/vme_user/Makefile
@@ -3,4 +3,7 @@
# Makefile for the VME device drivers.
#
+obj-$(CONFIG_VME_BUS) += vme.o
obj-$(CONFIG_VME_USER) += vme_user.o
+obj-$(CONFIG_VME_TSI148) += vme_tsi148.o
+obj-$(CONFIG_VME_FAKE) += vme_fake.o
diff --git a/drivers/vme/vme.c b/drivers/staging/vme_user/vme.c
similarity index 99%
rename from drivers/vme/vme.c
rename to drivers/staging/vme_user/vme.c
index 8dba2018..b555568 100644
--- a/drivers/vme/vme.c
+++ b/drivers/staging/vme_user/vme.c
@@ -26,8 +26,8 @@
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
-#include <linux/vme.h>
+#include "vme.h"
#include "vme_bridge.h"
/* Bitmask and list of registered buses both protected by common mutex */
diff --git a/include/linux/vme.h b/drivers/staging/vme_user/vme.h
similarity index 100%
rename from include/linux/vme.h
rename to drivers/staging/vme_user/vme.h
diff --git a/drivers/vme/vme_bridge.h b/drivers/staging/vme_user/vme_bridge.h
similarity index 99%
rename from drivers/vme/vme_bridge.h
rename to drivers/staging/vme_user/vme_bridge.h
index 42ecf96..0bbefe9 100644
--- a/drivers/vme/vme_bridge.h
+++ b/drivers/staging/vme_user/vme_bridge.h
@@ -2,7 +2,7 @@
#ifndef _VME_BRIDGE_H_
#define _VME_BRIDGE_H_
-#include <linux/vme.h>
+#include "vme.h"
#define VME_CRCSR_BUF_SIZE (508*1024)
/*
diff --git a/drivers/vme/bridges/vme_fake.c b/drivers/staging/vme_user/vme_fake.c
similarity index 99%
rename from drivers/vme/bridges/vme_fake.c
rename to drivers/staging/vme_user/vme_fake.c
index 6a1bc284..dd646b0 100644
--- a/drivers/vme/bridges/vme_fake.c
+++ b/drivers/staging/vme_user/vme_fake.c
@@ -29,9 +29,9 @@
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/types.h>
-#include <linux/vme.h>
-#include "../vme_bridge.h"
+#include "vme.h"
+#include "vme_bridge.h"
/*
* Define the number of each that the fake driver supports.
diff --git a/drivers/vme/bridges/vme_tsi148.c b/drivers/staging/vme_user/vme_tsi148.c
similarity index 99%
rename from drivers/vme/bridges/vme_tsi148.c
rename to drivers/staging/vme_user/vme_tsi148.c
index be9051b..9564762 100644
--- a/drivers/vme/bridges/vme_tsi148.c
+++ b/drivers/staging/vme_user/vme_tsi148.c
@@ -26,9 +26,9 @@
#include <linux/io.h>
#include <linux/uaccess.h>
#include <linux/byteorder/generic.h>
-#include <linux/vme.h>
-#include "../vme_bridge.h"
+#include "vme.h"
+#include "vme_bridge.h"
#include "vme_tsi148.h"
static int tsi148_probe(struct pci_dev *, const struct pci_device_id *);
diff --git a/drivers/vme/bridges/vme_tsi148.h b/drivers/staging/vme_user/vme_tsi148.h
similarity index 100%
rename from drivers/vme/bridges/vme_tsi148.h
rename to drivers/staging/vme_user/vme_tsi148.h
diff --git a/drivers/staging/vme_user/vme_user.c b/drivers/staging/vme_user/vme_user.c
index 859af79..4e533c0b 100644
--- a/drivers/staging/vme_user/vme_user.c
+++ b/drivers/staging/vme_user/vme_user.c
@@ -33,8 +33,8 @@
#include <linux/io.h>
#include <linux/uaccess.h>
-#include <linux/vme.h>
+#include "vme.h"
#include "vme_user.h"
static const char driver_name[] = "vme_user";
diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c
index 577a38f..5de841c 100644
--- a/drivers/staging/vt6655/baseband.c
+++ b/drivers/staging/vt6655/baseband.c
@@ -1912,7 +1912,7 @@
iowrite8(by_bb_addr, iobase + MAC_REG_BBREGADR);
/* turn on REGR */
- MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
by_value = ioread8(iobase + MAC_REG_BBREGCTL);
@@ -1957,7 +1957,7 @@
iowrite8(by_data, iobase + MAC_REG_BBREGDATA);
/* turn on BBREGCTL_REGW */
- MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
by_value = ioread8(iobase + MAC_REG_BBREGCTL);
@@ -2013,8 +2013,8 @@
byVT3253B0_AGC4_RFMD2959[ii][0],
byVT3253B0_AGC4_RFMD2959[ii][1]);
- VNSvOutPortD(iobase + MAC_REG_ITRTMSET, 0x23);
- MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
+ iowrite32(0x23, iobase + MAC_REG_ITRTMSET);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0));
}
priv->abyBBVGA[0] = 0x18;
priv->abyBBVGA[1] = 0x0A;
@@ -2054,7 +2054,7 @@
byVT3253B0_AGC[ii][1]);
iowrite8(0x23, iobase + MAC_REG_ITRTMSET);
- MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0));
priv->abyBBVGA[0] = 0x14;
priv->abyBBVGA[1] = 0x0A;
diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c
index 2cde008..846469c 100644
--- a/drivers/staging/vt6655/card.c
+++ b/drivers/staging/vt6655/card.c
@@ -293,12 +293,10 @@
qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp,
local_tsf);
/* adjust TSF, HW's TSF add TSF Offset reg */
- VNSvOutPortD(priv->port_offset + MAC_REG_TSFOFST,
- (u32)qwTSFOffset);
- VNSvOutPortD(priv->port_offset + MAC_REG_TSFOFST + 4,
- (u32)(qwTSFOffset >> 32));
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL,
- TFTCTL_TSFSYNCEN);
+ qwTSFOffset = le64_to_cpu(qwTSFOffset);
+ iowrite32((u32)qwTSFOffset, priv->port_offset + MAC_REG_TSFOFST);
+ iowrite32((u32)(qwTSFOffset >> 32), priv->port_offset + MAC_REG_TSFOFST + 4);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN);
}
return true;
}
@@ -326,13 +324,13 @@
qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
/* set HW beacon interval */
- VNSvOutPortW(priv->port_offset + MAC_REG_BI, wBeaconInterval);
+ iowrite16(wBeaconInterval, priv->port_offset + MAC_REG_BI);
priv->wBeaconInterval = wBeaconInterval;
/* Set NextTBTT */
- VNSvOutPortD(priv->port_offset + MAC_REG_NEXTTBTT, (u32)qwNextTBTT);
- VNSvOutPortD(priv->port_offset + MAC_REG_NEXTTBTT + 4,
- (u32)(qwNextTBTT >> 32));
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ qwNextTBTT = le64_to_cpu(qwNextTBTT);
+ iowrite32((u32)qwNextTBTT, priv->port_offset + MAC_REG_NEXTTBTT);
+ iowrite32((u32)(qwNextTBTT >> 32), priv->port_offset + MAC_REG_NEXTTBTT + 4);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
return true;
}
@@ -354,29 +352,28 @@
switch (priv->byRFType) {
case RF_RFMD2959:
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_TXPEINV);
- MACvWordRegBitsOn(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_SWPE1);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_TXPEINV);
+ vt6655_mac_word_reg_bits_on(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_SWPE1);
break;
case RF_AIROHA:
case RF_AL2230S:
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_SWPE2);
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_SWPE3);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_SWPE2);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_SWPE3);
break;
}
- MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
bb_set_deep_sleep(priv, priv->local_id);
priv->radio_off = true;
pr_debug("chester power off\n");
- MACvRegBitsOn(priv->port_offset, MAC_REG_GPIOCTL0,
- LED_ACTSET); /* LED issue */
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */
}
void CARDvSafeResetTx(struct vnt_private *priv)
@@ -411,8 +408,7 @@
MACvSetCurrTXDescAddr(TYPE_AC0DMA, priv, priv->td1_pool_dma);
/* set MAC Beacon TX pointer */
- MACvSetCurrBCNTxDescAddr(priv->port_offset,
- (priv->tx_beacon_dma));
+ iowrite32((u32)priv->tx_beacon_dma, priv->port_offset + MAC_REG_BCNDMAPTR);
}
/*
@@ -453,8 +449,8 @@
}
/* set perPkt mode */
- MACvRx0PerPktMode(priv->port_offset);
- MACvRx1PerPktMode(priv->port_offset);
+ iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL0);
+ iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL1);
/* set MAC RD pointer */
MACvSetCurrRx0DescAddr(priv, priv->rd0_pool_dma);
@@ -553,7 +549,7 @@
/* swap over to get correct write order */
swap(phy.swap[0], phy.swap[1]);
- VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_1, phy.field_write);
+ iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_1);
/* RSPINF_b_2 */
vnt_get_phy_field(priv, 14,
@@ -562,7 +558,7 @@
swap(phy.swap[0], phy.swap[1]);
- VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_2, phy.field_write);
+ iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_2);
/* RSPINF_b_5 */
vnt_get_phy_field(priv, 14,
@@ -571,7 +567,7 @@
swap(phy.swap[0], phy.swap[1]);
- VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_5, phy.field_write);
+ iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_5);
/* RSPINF_b_11 */
vnt_get_phy_field(priv, 14,
@@ -580,75 +576,66 @@
swap(phy.swap[0], phy.swap[1]);
- VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_11, phy.field_write);
+ iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_11);
/* RSPINF_a_6 */
s_vCalculateOFDMRParameter(RATE_6M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_6,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_6);
/* RSPINF_a_9 */
s_vCalculateOFDMRParameter(RATE_9M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_9,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_9);
/* RSPINF_a_12 */
s_vCalculateOFDMRParameter(RATE_12M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_12,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_12);
/* RSPINF_a_18 */
s_vCalculateOFDMRParameter(RATE_18M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_18,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_18);
/* RSPINF_a_24 */
s_vCalculateOFDMRParameter(RATE_24M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_24,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_24);
/* RSPINF_a_36 */
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
RATE_36M),
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_36,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_36);
/* RSPINF_a_48 */
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
RATE_48M),
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_48,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_48);
/* RSPINF_a_54 */
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
RATE_54M),
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_54,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_54);
/* RSPINF_a_72 */
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
RATE_54M),
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_72,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_72);
/* Set to Page0 */
MACvSelectPage0(priv->port_offset);
@@ -734,9 +721,9 @@
* In:
* priv - The adapter to be read
* Out:
- * qwCurrTSF - Current TSF counter
+ * none
*
- * Return Value: true if success; otherwise false
+ * Return Value: Current TSF counter
*/
u64 vt6655_get_current_tsf(struct vnt_private *priv)
{
@@ -745,7 +732,7 @@
unsigned char data;
u32 low, high;
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
data = ioread8(iobase + MAC_REG_TFTCTL);
if (!(data & TFTCTL_TSFCNTRRD))
@@ -808,9 +795,10 @@
qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
/* Set NextTBTT */
- VNSvOutPortD(iobase + MAC_REG_NEXTTBTT, (u32)qwNextTBTT);
- VNSvOutPortD(iobase + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32));
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ qwNextTBTT = le64_to_cpu(qwNextTBTT);
+ iowrite32((u32)qwNextTBTT, iobase + MAC_REG_NEXTTBTT);
+ iowrite32((u32)(qwNextTBTT >> 32), iobase + MAC_REG_NEXTTBTT + 4);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
}
/*
@@ -834,8 +822,9 @@
qwTSF = CARDqGetNextTBTT(qwTSF, wBeaconInterval);
/* Set NextTBTT */
- VNSvOutPortD(iobase + MAC_REG_NEXTTBTT, (u32)qwTSF);
- VNSvOutPortD(iobase + MAC_REG_NEXTTBTT + 4, (u32)(qwTSF >> 32));
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ qwTSF = le64_to_cpu(qwTSF);
+ iowrite32((u32)qwTSF, iobase + MAC_REG_NEXTTBTT);
+ iowrite32((u32)(qwTSF >> 32), iobase + MAC_REG_NEXTTBTT + 4);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);
}
diff --git a/drivers/staging/vt6655/channel.c b/drivers/staging/vt6655/channel.c
index 652dcaf..e926f98 100644
--- a/drivers/staging/vt6655/channel.c
+++ b/drivers/staging/vt6655/channel.c
@@ -94,7 +94,7 @@
}
/* clear NAV */
- MACvRegBitsOn(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV);
/* TX_PE will reserve 3 us for MAX2829 A mode only,
* it is for better TX throughput
diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c
index e8ac7b9..bab08a4 100644
--- a/drivers/staging/vt6655/device_main.c
+++ b/drivers/staging/vt6655/device_main.c
@@ -122,6 +122,9 @@
static void device_free_info(struct vnt_private *priv);
static void device_print_info(struct vnt_private *priv);
+static void vt6655_mac_write_bssid_addr(void __iomem *iobase, const u8 *mac_addr);
+static void vt6655_mac_read_ether_addr(void __iomem *iobase, u8 *mac_addr);
+
static int device_init_rd0_ring(struct vnt_private *priv);
static int device_init_rd1_ring(struct vnt_private *priv);
static int device_init_td0_ring(struct vnt_private *priv);
@@ -186,6 +189,22 @@
pr_debug(" byBBType= %d\n", (int)priv->byBBType);
}
+static void vt6655_mac_write_bssid_addr(void __iomem *iobase, const u8 *mac_addr)
+{
+ iowrite8(1, iobase + MAC_REG_PAGE1SEL);
+ for (int i = 0; i < 6; i++)
+ iowrite8(mac_addr[i], iobase + MAC_REG_BSSID0 + i);
+ iowrite8(0, iobase + MAC_REG_PAGE1SEL);
+}
+
+static void vt6655_mac_read_ether_addr(void __iomem *iobase, u8 *mac_addr)
+{
+ iowrite8(1, iobase + MAC_REG_PAGE1SEL);
+ for (int i = 0; i < 6; i++)
+ mac_addr[i] = ioread8(iobase + MAC_REG_PAR0 + i);
+ iowrite8(0, iobase + MAC_REG_PAGE1SEL);
+}
+
/*
* Initialisation of MAC & BBP registers
*/
@@ -340,8 +359,8 @@
}
/* use relative tx timeout and 802.11i D4 */
- MACvWordRegBitsOn(priv->port_offset,
- MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
+ vt6655_mac_word_reg_bits_on(priv->port_offset, MAC_REG_CFG,
+ (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
/* set performance parameter by registry */
MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
@@ -398,7 +417,7 @@
CARDvSafeResetTx(priv);
if (priv->local_id <= REV_ID_VT3253_A1)
- MACvRegBitsOn(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
/* Turn On Rx DMA */
MACvReceive0(priv->port_offset);
@@ -1055,13 +1074,12 @@
* update ISR counter
*/
while (isr && priv->vif) {
- MACvWriteISR(priv->port_offset, isr);
+ iowrite32(isr, priv->port_offset + MAC_REG_ISR);
if (isr & ISR_FETALERR) {
pr_debug(" ISR_FETALERR\n");
iowrite8(0, priv->port_offset + MAC_REG_SOFTPWRCTL);
- VNSvOutPortW(priv->port_offset +
- MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
+ iowrite16(SOFTPWRCTL_SWPECTI, priv->port_offset + MAC_REG_SOFTPWRCTL);
device_error(priv, isr);
}
@@ -1135,7 +1153,7 @@
if (priv->vif)
vnt_interrupt_process(priv);
- MACvIntEnable(priv->port_offset, IMR_MASK_VALUE);
+ iowrite32(IMR_MASK_VALUE, priv->port_offset + MAC_REG_IMR);
}
static irqreturn_t vnt_interrupt(int irq, void *arg)
@@ -1144,7 +1162,7 @@
schedule_work(&priv->interrupt_work);
- MACvIntDisable(priv->port_offset);
+ iowrite32(0, priv->port_offset + MAC_REG_IMR);
return IRQ_HANDLED;
}
@@ -1253,8 +1271,8 @@
device_init_registers(priv);
- dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
- MACvIntEnable(priv->port_offset, IMR_MASK_VALUE);
+ dev_dbg(&priv->pcid->dev, "enable MAC interrupt\n");
+ iowrite32(IMR_MASK_VALUE, priv->port_offset + MAC_REG_IMR);
ieee80211_wake_queues(hw);
@@ -1304,15 +1322,15 @@
case NL80211_IFTYPE_STATION:
break;
case NL80211_IFTYPE_ADHOC:
- MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
- MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
break;
case NL80211_IFTYPE_AP:
- MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
- MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
break;
default:
@@ -1333,16 +1351,16 @@
case NL80211_IFTYPE_STATION:
break;
case NL80211_IFTYPE_ADHOC:
- MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
- MACvRegBitsOff(priv->port_offset,
- MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
- MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_off(priv->port_offset,
+ MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
break;
case NL80211_IFTYPE_AP:
- MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
- MACvRegBitsOff(priv->port_offset,
- MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
- MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_off(priv->port_offset,
+ MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
break;
default:
break;
@@ -1406,7 +1424,7 @@
spin_lock_irqsave(&priv->lock, flags);
- MACvWriteBSSIDAddress(priv->port_offset, conf->bssid);
+ vt6655_mac_write_bssid_addr(priv->port_offset, conf->bssid);
spin_unlock_irqrestore(&priv->lock, flags);
}
@@ -1458,11 +1476,10 @@
if (conf->enable_beacon) {
vnt_beacon_enable(priv, vif, conf);
- MACvRegBitsOn(priv->port_offset, MAC_REG_TCR,
- TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
} else {
- MACvRegBitsOff(priv->port_offset, MAC_REG_TCR,
- TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR,
+ TCR_AUTOBCNTX);
}
}
@@ -1523,20 +1540,17 @@
if (priv->mc_list_count > 2) {
MACvSelectPage1(priv->port_offset);
- VNSvOutPortD(priv->port_offset +
- MAC_REG_MAR0, 0xffffffff);
- VNSvOutPortD(priv->port_offset +
- MAC_REG_MAR0 + 4, 0xffffffff);
+ iowrite32(0xffffffff, priv->port_offset + MAC_REG_MAR0);
+ iowrite32(0xffffffff, priv->port_offset + MAC_REG_MAR0 + 4);
MACvSelectPage0(priv->port_offset);
} else {
MACvSelectPage1(priv->port_offset);
- VNSvOutPortD(priv->port_offset +
- MAC_REG_MAR0, (u32)multicast);
- VNSvOutPortD(priv->port_offset +
- MAC_REG_MAR0 + 4,
- (u32)(multicast >> 32));
+ multicast = le64_to_cpu(multicast);
+ iowrite32((u32)multicast, priv->port_offset + MAC_REG_MAR0);
+ iowrite32((u32)(multicast >> 32),
+ priv->port_offset + MAC_REG_MAR0 + 4);
MACvSelectPage0(priv->port_offset);
}
@@ -1726,7 +1740,7 @@
}
/* initial to reload eeprom */
MACvInitialize(priv);
- MACvReadEtherAddress(priv->port_offset, priv->abyCurrentNetAddr);
+ vt6655_mac_read_ether_addr(priv->port_offset, priv->abyCurrentNetAddr);
/* Get RFType */
priv->byRFType = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_RFTYPE);
diff --git a/drivers/staging/vt6655/mac.c b/drivers/staging/vt6655/mac.c
index 88ddd06..dcc6495 100644
--- a/drivers/staging/vt6655/mac.c
+++ b/drivers/staging/vt6655/mac.c
@@ -38,6 +38,47 @@
#include "mac.h"
+void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask)
+{
+ unsigned char reg_value;
+
+ reg_value = ioread8(iobase + reg_offset);
+ iowrite8(reg_value | bit_mask, iobase + reg_offset);
+}
+
+void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask)
+{
+ unsigned short reg_value;
+
+ reg_value = ioread16(iobase + reg_offset);
+ iowrite16(reg_value | (bit_mask), iobase + reg_offset);
+}
+
+void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask)
+{
+ unsigned char reg_value;
+
+ reg_value = ioread8(iobase + reg_offset);
+ iowrite8(reg_value & ~(bit_mask), iobase + reg_offset);
+}
+
+void vt6655_mac_word_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask)
+{
+ unsigned short reg_value;
+
+ reg_value = ioread16(iobase + reg_offset);
+ iowrite16(reg_value & ~(bit_mask), iobase + reg_offset);
+}
+
+static void vt6655_mac_clear_stck_ds(void __iomem *iobase)
+{
+ u8 reg_value;
+
+ reg_value = ioread8(iobase + MAC_REG_STICKHW);
+ reg_value = reg_value & 0xFC;
+ iowrite8(reg_value, iobase + MAC_REG_STICKHW);
+}
+
/*
* Description:
* Test if all test bits off
@@ -337,7 +378,7 @@
}
/* try to safe shutdown RX */
- MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
@@ -392,7 +433,7 @@
}
/* try to safe shutdown TX */
- MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
@@ -423,7 +464,7 @@
{
void __iomem *io_base = priv->port_offset;
- MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
if (!MACbSafeRxOff(priv)) {
pr_debug(" MACbSafeRxOff == false)\n");
@@ -436,7 +477,7 @@
return false;
}
- MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
return true;
}
@@ -458,7 +499,7 @@
{
void __iomem *io_base = priv->port_offset;
/* disable MAC IMR */
- MACvIntDisable(io_base);
+ iowrite32(0, io_base + MAC_REG_IMR);
MACvSetLoopbackMode(priv, MAC_LB_INTERNAL);
/* stop the adapter */
if (!MACbSafeStop(priv)) {
@@ -486,7 +527,7 @@
{
void __iomem *io_base = priv->port_offset;
/* clear sticky bits */
- MACvClearStckDS(io_base);
+ vt6655_mac_clear_stck_ds(io_base);
/* disable force PME-enable */
iowrite8(PME_OVR, io_base + MAC_REG_PMC1);
/* only 3253 A */
@@ -730,7 +771,7 @@
return true;
/* Disable PS */
- MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
/* Check if SyncFlushOK */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
diff --git a/drivers/staging/vt6655/mac.h b/drivers/staging/vt6655/mac.h
index 57ae3bd..0122c46 100644
--- a/drivers/staging/vt6655/mac.h
+++ b/drivers/staging/vt6655/mac.h
@@ -18,7 +18,7 @@
#ifndef __MAC_H__
#define __MAC_H__
-#include "upc.h"
+#include "device.h"
/*--------------------- Export Definitions -------------------------*/
/* Registers in the MAC */
@@ -537,82 +537,14 @@
/*--------------------- Export Macros ------------------------------*/
-#define MACvRegBitsOn(iobase, byRegOfs, byBits) \
-do { \
- unsigned char byData; \
- byData = ioread8(iobase + byRegOfs); \
- iowrite8(byData | (byBits), iobase + byRegOfs); \
-} while (0)
-
-#define MACvWordRegBitsOn(iobase, byRegOfs, wBits) \
-do { \
- unsigned short wData; \
- wData = ioread16(iobase + byRegOfs); \
- VNSvOutPortW(iobase + byRegOfs, wData | (wBits)); \
-} while (0)
-
-#define MACvRegBitsOff(iobase, byRegOfs, byBits) \
-do { \
- unsigned char byData; \
- byData = ioread8(iobase + byRegOfs); \
- iowrite8(byData & ~(byBits), iobase + byRegOfs); \
-} while (0)
-
-#define MACvWordRegBitsOff(iobase, byRegOfs, wBits) \
-do { \
- unsigned short wData; \
- wData = ioread16(iobase + byRegOfs); \
- VNSvOutPortW(iobase + byRegOfs, wData & ~(wBits)); \
-} while (0)
-
-/* set the chip with current BCN tx descriptor address */
-#define MACvSetCurrBCNTxDescAddr(iobase, dwCurrDescAddr) \
- VNSvOutPortD(iobase + MAC_REG_BCNDMAPTR, \
- dwCurrDescAddr)
-
-/* set the chip with current BCN length */
-#define MACvSetCurrBCNLength(iobase, wCurrBCNLength) \
- VNSvOutPortW(iobase + MAC_REG_BCNDMACTL + 2, \
- wCurrBCNLength)
-
-#define MACvWriteBSSIDAddress(iobase, pbyEtherAddr) \
-do { \
- iowrite8(1, iobase + MAC_REG_PAGE1SEL); \
- iowrite8(pbyEtherAddr[0], iobase + MAC_REG_BSSID0); \
- iowrite8(pbyEtherAddr[1], iobase + MAC_REG_BSSID0 + 1); \
- iowrite8(pbyEtherAddr[2], iobase + MAC_REG_BSSID0 + 2); \
- iowrite8(pbyEtherAddr[3], iobase + MAC_REG_BSSID0 + 3); \
- iowrite8(pbyEtherAddr[4], iobase + MAC_REG_BSSID0 + 4); \
- iowrite8(pbyEtherAddr[5], iobase + MAC_REG_BSSID0 + 5); \
- iowrite8(0, iobase + MAC_REG_PAGE1SEL); \
-} while (0)
-
-#define MACvReadEtherAddress(iobase, pbyEtherAddr) \
-do { \
- iowrite8(1, iobase + MAC_REG_PAGE1SEL); \
- pbyEtherAddr[0] = ioread8(iobase + MAC_REG_PAR0); \
- pbyEtherAddr[1] = ioread8(iobase + MAC_REG_PAR0 + 1); \
- pbyEtherAddr[2] = ioread8(iobase + MAC_REG_PAR0 + 2); \
- pbyEtherAddr[3] = ioread8(iobase + MAC_REG_PAR0 + 3); \
- pbyEtherAddr[4] = ioread8(iobase + MAC_REG_PAR0 + 4); \
- pbyEtherAddr[5] = ioread8(iobase + MAC_REG_PAR0 + 5); \
- iowrite8(0, iobase + MAC_REG_PAGE1SEL); \
-} while (0)
-
-#define MACvRx0PerPktMode(iobase) \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL0, RX_PERPKT)
-
-#define MACvRx1PerPktMode(iobase) \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL1, RX_PERPKT)
-
#define MACvReceive0(iobase) \
do { \
unsigned long dwData; \
dwData = ioread32(iobase + MAC_REG_RXDMACTL0); \
if (dwData & DMACTL_RUN) \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL0, DMACTL_WAKE); \
+ iowrite32(DMACTL_WAKE, iobase + MAC_REG_RXDMACTL0); \
else \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL0, DMACTL_RUN); \
+ iowrite32(DMACTL_RUN, iobase + MAC_REG_RXDMACTL0); \
} while (0)
#define MACvReceive1(iobase) \
@@ -620,9 +552,9 @@
unsigned long dwData; \
dwData = ioread32(iobase + MAC_REG_RXDMACTL1); \
if (dwData & DMACTL_RUN) \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL1, DMACTL_WAKE); \
+ iowrite32(DMACTL_WAKE, iobase + MAC_REG_RXDMACTL1); \
else \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL1, DMACTL_RUN); \
+ iowrite32(DMACTL_RUN, iobase + MAC_REG_RXDMACTL1); \
} while (0)
#define MACvTransmit0(iobase) \
@@ -630,9 +562,9 @@
unsigned long dwData; \
dwData = ioread32(iobase + MAC_REG_TXDMACTL0); \
if (dwData & DMACTL_RUN) \
- VNSvOutPortD(iobase + MAC_REG_TXDMACTL0, DMACTL_WAKE); \
+ iowrite32(DMACTL_WAKE, iobase + MAC_REG_TXDMACTL0); \
else \
- VNSvOutPortD(iobase + MAC_REG_TXDMACTL0, DMACTL_RUN); \
+ iowrite32(DMACTL_RUN, iobase + MAC_REG_TXDMACTL0); \
} while (0)
#define MACvTransmitAC0(iobase) \
@@ -640,28 +572,11 @@
unsigned long dwData; \
dwData = ioread32(iobase + MAC_REG_AC0DMACTL); \
if (dwData & DMACTL_RUN) \
- VNSvOutPortD(iobase + MAC_REG_AC0DMACTL, DMACTL_WAKE); \
+ iowrite32(DMACTL_WAKE, iobase + MAC_REG_AC0DMACTL); \
else \
- VNSvOutPortD(iobase + MAC_REG_AC0DMACTL, DMACTL_RUN); \
+ iowrite32(DMACTL_RUN, iobase + MAC_REG_AC0DMACTL); \
} while (0)
-#define MACvClearStckDS(iobase) \
-do { \
- unsigned char byOrgValue; \
- byOrgValue = ioread8(iobase + MAC_REG_STICKHW); \
- byOrgValue = byOrgValue & 0xFC; \
- iowrite8(byOrgValue, iobase + MAC_REG_STICKHW); \
-} while (0)
-
-#define MACvWriteISR(iobase, dwValue) \
- VNSvOutPortD(iobase + MAC_REG_ISR, dwValue)
-
-#define MACvIntEnable(iobase, dwMask) \
- VNSvOutPortD(iobase + MAC_REG_IMR, dwMask)
-
-#define MACvIntDisable(iobase) \
- VNSvOutPortD(iobase + MAC_REG_IMR, 0)
-
#define MACvSelectPage0(iobase) \
iowrite8(0, iobase + MAC_REG_PAGE1SEL)
@@ -673,7 +588,7 @@
unsigned long dwOrgValue; \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue | ENCFG_PROTECTMD; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvDisableProtectMD(iobase) \
@@ -681,7 +596,7 @@
unsigned long dwOrgValue; \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue & ~ENCFG_PROTECTMD; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvEnableBarkerPreambleMd(iobase) \
@@ -689,7 +604,7 @@
unsigned long dwOrgValue; \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue | ENCFG_BARKERPREAM; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvDisableBarkerPreambleMd(iobase) \
@@ -697,7 +612,7 @@
unsigned long dwOrgValue; \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue & ~ENCFG_BARKERPREAM; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvSetBBType(iobase, byTyp) \
@@ -706,15 +621,20 @@
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue & ~ENCFG_BBTYPE_MASK; \
dwOrgValue = dwOrgValue | (unsigned long)byTyp; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvSetRFLE_LatchBase(iobase) \
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT)
+ vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT)
#define MAKEWORD(lb, hb) \
((unsigned short)(((unsigned char)(lb)) | (((unsigned short)((unsigned char)(hb))) << 8)))
+void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask);
+void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask);
+void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask);
+void vt6655_mac_word_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask);
+
bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs,
unsigned char byTestBits);
diff --git a/drivers/staging/vt6655/power.c b/drivers/staging/vt6655/power.c
index 06066fa..8527ad3 100644
--- a/drivers/staging/vt6655/power.c
+++ b/drivers/staging/vt6655/power.c
@@ -52,30 +52,30 @@
u16 wAID = priv->current_aid | BIT(14) | BIT(15);
/* set period of power up before TBTT */
- VNSvOutPortW(priv->port_offset + MAC_REG_PWBT, C_PWBT);
+ iowrite16(C_PWBT, priv->port_offset + MAC_REG_PWBT);
if (priv->op_mode != NL80211_IFTYPE_ADHOC) {
/* set AID */
- VNSvOutPortW(priv->port_offset + MAC_REG_AIDATIM, wAID);
+ iowrite16(wAID, priv->port_offset + MAC_REG_AIDATIM);
}
/* Set AutoSleep */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
/* Set HWUTSF */
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
if (wListenInterval >= 2) {
/* clear always listen beacon */
- MACvRegBitsOff(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
/* first time set listen next beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
} else {
/* always listen beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
}
/* enable power saving hw function */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_PSEN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_PSEN);
priv->bEnablePSMode = true;
priv->bPWBitOn = true;
@@ -98,13 +98,13 @@
MACbPSWakeup(priv);
/* clear AutoSleep */
- MACvRegBitsOff(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
/* clear HWUTSF */
- MACvRegBitsOff(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
/* set always listen beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
priv->bEnablePSMode = false;
@@ -135,8 +135,7 @@
if (priv->wake_up_count == 1) {
/* Turn on wake up to listen next beacon */
- MACvRegBitsOn(priv->port_offset,
- MAC_REG_PSCTL, PSCTL_LNBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
wake_up = true;
}
}
diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c
index ee5e2e0..1fadc2f 100644
--- a/drivers/staging/vt6655/rf.c
+++ b/drivers/staging/vt6655/rf.c
@@ -171,7 +171,7 @@
unsigned short ww;
unsigned long dwValue;
- VNSvOutPortD(iobase + MAC_REG_IFREGCTL, dwData);
+ iowrite32((u32)dwData, iobase + MAC_REG_IFREGCTL);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
@@ -209,10 +209,10 @@
/* 3-wire control for normal mode */
iowrite8(0, iobase + MAC_REG_SOFTPWRCTL);
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI |
- SOFTPWRCTL_TXPEINV));
+ vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL,
+ (SOFTPWRCTL_SWPECTI | SOFTPWRCTL_TXPEINV));
/* PLL Off */
- MACvWordRegBitsOff(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
+ vt6655_mac_word_reg_bits_off(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
/* patch abnormal AL2230 frequency output */
IFRFbWriteEmbedded(priv, (0x07168700 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW));
@@ -222,7 +222,7 @@
MACvTimer0MicroSDelay(priv, 30); /* delay 30 us */
/* PLL On */
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
+ vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
MACvTimer0MicroSDelay(priv, 150);/* 150us */
ret &= IFRFbWriteEmbedded(priv, (0x00d80f00 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW));
@@ -232,10 +232,10 @@
ret &= IFRFbWriteEmbedded(priv,
al2230_init_table[CB_AL2230_INIT_SEQ - 1]);
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 |
- SOFTPWRCTL_SWPE2 |
- SOFTPWRCTL_SWPECTI |
- SOFTPWRCTL_TXPEINV));
+ vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 |
+ SOFTPWRCTL_SWPE2 |
+ SOFTPWRCTL_SWPECTI |
+ SOFTPWRCTL_TXPEINV));
/* 3-wire control for power saving mode */
iowrite8(PSSIG_WPE3 | PSSIG_WPE2, iobase + MAC_REG_PSPWRSIG);
@@ -350,7 +350,7 @@
unsigned char sleep_count = 0;
unsigned short idx = MISCFIFO_SYNDATA_IDX;
- VNSvOutPortW(iobase + MAC_REG_MISCFFNDEX, 0);
+ iowrite16(0, iobase + MAC_REG_MISCFFNDEX);
switch (rf_type) {
case RF_AIROHA:
case RF_AL2230S:
diff --git a/drivers/staging/vt6655/rxtx.c b/drivers/staging/vt6655/rxtx.c
index 85cd01c..5bdb517 100644
--- a/drivers/staging/vt6655/rxtx.c
+++ b/drivers/staging/vt6655/rxtx.c
@@ -1420,11 +1420,11 @@
priv->wBCNBufLen = sizeof(*short_head) + skb->len;
- MACvSetCurrBCNTxDescAddr(priv->port_offset, priv->tx_beacon_dma);
+ iowrite32((u32)priv->tx_beacon_dma, priv->port_offset + MAC_REG_BCNDMAPTR);
- MACvSetCurrBCNLength(priv->port_offset, priv->wBCNBufLen);
+ iowrite16(priv->wBCNBufLen, priv->port_offset + MAC_REG_BCNDMACTL + 2);
/* Set auto Transmit on */
- MACvRegBitsOn(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
/* Poll Transmit the adapter */
iowrite8(BEACON_READY, priv->port_offset + MAC_REG_BCNDMACTL);
diff --git a/drivers/staging/vt6655/srom.c b/drivers/staging/vt6655/srom.c
index 722a2cc..ee5ca4d 100644
--- a/drivers/staging/vt6655/srom.c
+++ b/drivers/staging/vt6655/srom.c
@@ -27,7 +27,7 @@
*
*/
-#include "upc.h"
+#include "device.h"
#include "mac.h"
#include "srom.h"
diff --git a/drivers/staging/vt6655/upc.h b/drivers/staging/vt6655/upc.h
deleted file mode 100644
index 2a47f57..0000000
--- a/drivers/staging/vt6655/upc.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
- * All rights reserved.
- *
- * Purpose: Macros to access device
- *
- * Author: Tevin Chen
- *
- * Date: Mar 17, 1997
- *
- */
-
-#ifndef __UPC_H__
-#define __UPC_H__
-
-#include "device.h"
-
-/*--------------------- Export Definitions -------------------------*/
-
-/* For memory mapped IO */
-
-#define VNSvOutPortW(dwIOAddress, wData) \
- iowrite16((u16)(wData), dwIOAddress)
-
-#define VNSvOutPortD(dwIOAddress, dwData) \
- iowrite32((u32)(dwData), dwIOAddress)
-
-/*--------------------- Export Classes ----------------------------*/
-
-/*--------------------- Export Variables --------------------------*/
-
-/*--------------------- Export Functions --------------------------*/
-
-#endif /* __UPC_H__ */
diff --git a/drivers/vme/Kconfig b/drivers/vme/Kconfig
deleted file mode 100644
index c13dd9d..0000000
--- a/drivers/vme/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# VME configuration.
-#
-
-menuconfig VME_BUS
- bool "VME bridge support"
- depends on PCI
- help
- If you say Y here you get support for the VME bridge Framework.
-
-if VME_BUS
-
-source "drivers/vme/bridges/Kconfig"
-
-source "drivers/vme/boards/Kconfig"
-
-endif # VME
diff --git a/drivers/vme/Makefile b/drivers/vme/Makefile
deleted file mode 100644
index 8bfe4b3..0000000
--- a/drivers/vme/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for the VME bridge device drivers.
-#
-obj-$(CONFIG_VME_BUS) += vme.o
-
-obj-y += bridges/
-obj-y += boards/
diff --git a/drivers/vme/boards/Kconfig b/drivers/vme/boards/Kconfig
deleted file mode 100644
index 7a255f7..0000000
--- a/drivers/vme/boards/Kconfig
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-comment "VME Board Drivers"
-
-config VMIVME_7805
- tristate "VMIVME-7805"
- help
- If you say Y here you get support for the VMIVME-7805 board.
- This board has an additional control interface to the Universe II
- chip. This driver has to be included if you want to access VME bus
- with VMIVME-7805 board.
diff --git a/drivers/vme/boards/Makefile b/drivers/vme/boards/Makefile
deleted file mode 100644
index 8712238..0000000
--- a/drivers/vme/boards/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for the VME board drivers.
-#
-
-obj-$(CONFIG_VMIVME_7805) += vme_vmivme7805.o
diff --git a/drivers/vme/boards/vme_vmivme7805.c b/drivers/vme/boards/vme_vmivme7805.c
deleted file mode 100644
index 51e056b..0000000
--- a/drivers/vme/boards/vme_vmivme7805.c
+++ /dev/null
@@ -1,106 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Support for the VMIVME-7805 board access to the Universe II bridge.
- *
- * Author: Arthur Benilov <arthur.benilov@iba-group.com>
- * Copyright 2010 Ion Beam Application, Inc.
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/pci.h>
-#include <linux/poll.h>
-#include <linux/io.h>
-
-#include "vme_vmivme7805.h"
-
-static int vmic_probe(struct pci_dev *, const struct pci_device_id *);
-static void vmic_remove(struct pci_dev *);
-
-/** Base address to access FPGA register */
-static void __iomem *vmic_base;
-
-static const char driver_name[] = "vmivme_7805";
-
-static const struct pci_device_id vmic_ids[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_VMIC, PCI_DEVICE_ID_VTIMR) },
- { },
-};
-
-static struct pci_driver vmic_driver = {
- .name = driver_name,
- .id_table = vmic_ids,
- .probe = vmic_probe,
- .remove = vmic_remove,
-};
-
-static int vmic_probe(struct pci_dev *pdev, const struct pci_device_id *id)
-{
- int retval;
- u32 data;
-
- /* Enable the device */
- retval = pci_enable_device(pdev);
- if (retval) {
- dev_err(&pdev->dev, "Unable to enable device\n");
- goto err;
- }
-
- /* Map Registers */
- retval = pci_request_regions(pdev, driver_name);
- if (retval) {
- dev_err(&pdev->dev, "Unable to reserve resources\n");
- goto err_resource;
- }
-
- /* Map registers in BAR 0 */
- vmic_base = ioremap(pci_resource_start(pdev, 0), 16);
- if (!vmic_base) {
- dev_err(&pdev->dev, "Unable to remap CRG region\n");
- retval = -EIO;
- goto err_remap;
- }
-
- /* Clear the FPGA VME IF contents */
- iowrite32(0, vmic_base + VME_CONTROL);
-
- /* Clear any initial BERR */
- data = ioread32(vmic_base + VME_CONTROL) & 0x00000FFF;
- data |= BM_VME_CONTROL_BERRST;
- iowrite32(data, vmic_base + VME_CONTROL);
-
- /* Enable the vme interface and byte swapping */
- data = ioread32(vmic_base + VME_CONTROL) & 0x00000FFF;
- data = data | BM_VME_CONTROL_MASTER_ENDIAN |
- BM_VME_CONTROL_SLAVE_ENDIAN |
- BM_VME_CONTROL_ABLE |
- BM_VME_CONTROL_BERRI |
- BM_VME_CONTROL_BPENA |
- BM_VME_CONTROL_VBENA;
- iowrite32(data, vmic_base + VME_CONTROL);
-
- return 0;
-
-err_remap:
- pci_release_regions(pdev);
-err_resource:
- pci_disable_device(pdev);
-err:
- return retval;
-}
-
-static void vmic_remove(struct pci_dev *pdev)
-{
- iounmap(vmic_base);
- pci_release_regions(pdev);
- pci_disable_device(pdev);
-
-}
-
-module_pci_driver(vmic_driver);
-
-MODULE_DESCRIPTION("VMIVME-7805 board support driver");
-MODULE_AUTHOR("Arthur Benilov <arthur.benilov@iba-group.com>");
-MODULE_LICENSE("GPL");
-
diff --git a/drivers/vme/boards/vme_vmivme7805.h b/drivers/vme/boards/vme_vmivme7805.h
deleted file mode 100644
index c2c5e30..0000000
--- a/drivers/vme/boards/vme_vmivme7805.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * vmivme_7805.h
- *
- * Support for the VMIVME-7805 board access to the Universe II bridge.
- *
- * Author: Arthur Benilov <arthur.benilov@iba-group.com>
- * Copyright 2010 Ion Beam Application, Inc.
- */
-
-
-#ifndef _VMIVME_7805_H
-#define _VMIVME_7805_H
-
-#ifndef PCI_VENDOR_ID_VMIC
-#define PCI_VENDOR_ID_VMIC 0x114A
-#endif
-
-#ifndef PCI_DEVICE_ID_VTIMR
-#define PCI_DEVICE_ID_VTIMR 0x0004
-#endif
-
-#define VME_CONTROL 0x0000
-#define BM_VME_CONTROL_MASTER_ENDIAN 0x0001
-#define BM_VME_CONTROL_SLAVE_ENDIAN 0x0002
-#define BM_VME_CONTROL_ABLE 0x0004
-#define BM_VME_CONTROL_BERRI 0x0040
-#define BM_VME_CONTROL_BERRST 0x0080
-#define BM_VME_CONTROL_BPENA 0x0400
-#define BM_VME_CONTROL_VBENA 0x0800
-
-#endif /* _VMIVME_7805_H */
-
diff --git a/drivers/vme/bridges/Kconfig b/drivers/vme/bridges/Kconfig
deleted file mode 100644
index cb3baed..0000000
--- a/drivers/vme/bridges/Kconfig
+++ /dev/null
@@ -1,24 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-comment "VME Bridge Drivers"
-
-config VME_CA91CX42
- tristate "Universe II"
- depends on VIRT_TO_BUS
- help
- If you say Y here you get support for the Tundra CA91C142
- (Universe II) VME bridge chip.
-
-config VME_TSI148
- tristate "Tempe"
- depends on HAS_DMA
- help
- If you say Y here you get support for the Tundra TSI148 VME bridge
- chip.
-
-config VME_FAKE
- tristate "Fake"
- help
- If you say Y here you get support for the fake VME bridge. This
- provides a virtualised VME Bus for devices with no VME bridge. This
- is mainly useful for VME development (in the absence of VME
- hardware).
diff --git a/drivers/vme/bridges/Makefile b/drivers/vme/bridges/Makefile
deleted file mode 100644
index 0a6cf84..0000000
--- a/drivers/vme/bridges/Makefile
+++ /dev/null
@@ -1,4 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-$(CONFIG_VME_CA91CX42) += vme_ca91cx42.o
-obj-$(CONFIG_VME_TSI148) += vme_tsi148.o
-obj-$(CONFIG_VME_FAKE) += vme_fake.o
diff --git a/drivers/vme/bridges/vme_ca91cx42.c b/drivers/vme/bridges/vme_ca91cx42.c
deleted file mode 100644
index 439b0ed..0000000
--- a/drivers/vme/bridges/vme_ca91cx42.c
+++ /dev/null
@@ -1,1928 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Support for the Tundra Universe I/II VME-PCI Bridge Chips
- *
- * Author: Martyn Welch <martyn.welch@ge.com>
- * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
- *
- * Based on work by Tom Armistead and Ajit Prem
- * Copyright 2004 Motorola Inc.
- *
- * Derived from ca91c042.c by Michael Wyrick
- */
-
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/pci.h>
-#include <linux/dma-mapping.h>
-#include <linux/poll.h>
-#include <linux/interrupt.h>
-#include <linux/spinlock.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/time.h>
-#include <linux/io.h>
-#include <linux/uaccess.h>
-#include <linux/vme.h>
-
-#include "../vme_bridge.h"
-#include "vme_ca91cx42.h"
-
-static int ca91cx42_probe(struct pci_dev *, const struct pci_device_id *);
-static void ca91cx42_remove(struct pci_dev *);
-
-/* Module parameters */
-static int geoid;
-
-static const char driver_name[] = "vme_ca91cx42";
-
-static const struct pci_device_id ca91cx42_ids[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_TUNDRA, PCI_DEVICE_ID_TUNDRA_CA91C142) },
- { },
-};
-
-MODULE_DEVICE_TABLE(pci, ca91cx42_ids);
-
-static struct pci_driver ca91cx42_driver = {
- .name = driver_name,
- .id_table = ca91cx42_ids,
- .probe = ca91cx42_probe,
- .remove = ca91cx42_remove,
-};
-
-static u32 ca91cx42_DMA_irqhandler(struct ca91cx42_driver *bridge)
-{
- wake_up(&bridge->dma_queue);
-
- return CA91CX42_LINT_DMA;
-}
-
-static u32 ca91cx42_LM_irqhandler(struct ca91cx42_driver *bridge, u32 stat)
-{
- int i;
- u32 serviced = 0;
-
- for (i = 0; i < 4; i++) {
- if (stat & CA91CX42_LINT_LM[i]) {
- /* We only enable interrupts if the callback is set */
- bridge->lm_callback[i](bridge->lm_data[i]);
- serviced |= CA91CX42_LINT_LM[i];
- }
- }
-
- return serviced;
-}
-
-/* XXX This needs to be split into 4 queues */
-static u32 ca91cx42_MB_irqhandler(struct ca91cx42_driver *bridge, int mbox_mask)
-{
- wake_up(&bridge->mbox_queue);
-
- return CA91CX42_LINT_MBOX;
-}
-
-static u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge)
-{
- wake_up(&bridge->iack_queue);
-
- return CA91CX42_LINT_SW_IACK;
-}
-
-static u32 ca91cx42_VERR_irqhandler(struct vme_bridge *ca91cx42_bridge)
-{
- int val;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- val = ioread32(bridge->base + DGCS);
-
- if (!(val & 0x00000800)) {
- dev_err(ca91cx42_bridge->parent, "ca91cx42_VERR_irqhandler DMA "
- "Read Error DGCS=%08X\n", val);
- }
-
- return CA91CX42_LINT_VERR;
-}
-
-static u32 ca91cx42_LERR_irqhandler(struct vme_bridge *ca91cx42_bridge)
-{
- int val;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- val = ioread32(bridge->base + DGCS);
-
- if (!(val & 0x00000800))
- dev_err(ca91cx42_bridge->parent, "ca91cx42_LERR_irqhandler DMA "
- "Read Error DGCS=%08X\n", val);
-
- return CA91CX42_LINT_LERR;
-}
-
-
-static u32 ca91cx42_VIRQ_irqhandler(struct vme_bridge *ca91cx42_bridge,
- int stat)
-{
- int vec, i, serviced = 0;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
-
- for (i = 7; i > 0; i--) {
- if (stat & (1 << i)) {
- vec = ioread32(bridge->base +
- CA91CX42_V_STATID[i]) & 0xff;
-
- vme_irq_handler(ca91cx42_bridge, i, vec);
-
- serviced |= (1 << i);
- }
- }
-
- return serviced;
-}
-
-static irqreturn_t ca91cx42_irqhandler(int irq, void *ptr)
-{
- u32 stat, enable, serviced = 0;
- struct vme_bridge *ca91cx42_bridge;
- struct ca91cx42_driver *bridge;
-
- ca91cx42_bridge = ptr;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- enable = ioread32(bridge->base + LINT_EN);
- stat = ioread32(bridge->base + LINT_STAT);
-
- /* Only look at unmasked interrupts */
- stat &= enable;
-
- if (unlikely(!stat))
- return IRQ_NONE;
-
- if (stat & CA91CX42_LINT_DMA)
- serviced |= ca91cx42_DMA_irqhandler(bridge);
- if (stat & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 |
- CA91CX42_LINT_LM3))
- serviced |= ca91cx42_LM_irqhandler(bridge, stat);
- if (stat & CA91CX42_LINT_MBOX)
- serviced |= ca91cx42_MB_irqhandler(bridge, stat);
- if (stat & CA91CX42_LINT_SW_IACK)
- serviced |= ca91cx42_IACK_irqhandler(bridge);
- if (stat & CA91CX42_LINT_VERR)
- serviced |= ca91cx42_VERR_irqhandler(ca91cx42_bridge);
- if (stat & CA91CX42_LINT_LERR)
- serviced |= ca91cx42_LERR_irqhandler(ca91cx42_bridge);
- if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 |
- CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 |
- CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 |
- CA91CX42_LINT_VIRQ7))
- serviced |= ca91cx42_VIRQ_irqhandler(ca91cx42_bridge, stat);
-
- /* Clear serviced interrupts */
- iowrite32(serviced, bridge->base + LINT_STAT);
-
- return IRQ_HANDLED;
-}
-
-static int ca91cx42_irq_init(struct vme_bridge *ca91cx42_bridge)
-{
- int result, tmp;
- struct pci_dev *pdev;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- /* Need pdev */
- pdev = to_pci_dev(ca91cx42_bridge->parent);
-
- /* Disable interrupts from PCI to VME */
- iowrite32(0, bridge->base + VINT_EN);
-
- /* Disable PCI interrupts */
- iowrite32(0, bridge->base + LINT_EN);
- /* Clear Any Pending PCI Interrupts */
- iowrite32(0x00FFFFFF, bridge->base + LINT_STAT);
-
- result = request_irq(pdev->irq, ca91cx42_irqhandler, IRQF_SHARED,
- driver_name, ca91cx42_bridge);
- if (result) {
- dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n",
- pdev->irq);
- return result;
- }
-
- /* Ensure all interrupts are mapped to PCI Interrupt 0 */
- iowrite32(0, bridge->base + LINT_MAP0);
- iowrite32(0, bridge->base + LINT_MAP1);
- iowrite32(0, bridge->base + LINT_MAP2);
-
- /* Enable DMA, mailbox & LM Interrupts */
- tmp = CA91CX42_LINT_MBOX3 | CA91CX42_LINT_MBOX2 | CA91CX42_LINT_MBOX1 |
- CA91CX42_LINT_MBOX0 | CA91CX42_LINT_SW_IACK |
- CA91CX42_LINT_VERR | CA91CX42_LINT_LERR | CA91CX42_LINT_DMA;
-
- iowrite32(tmp, bridge->base + LINT_EN);
-
- return 0;
-}
-
-static void ca91cx42_irq_exit(struct ca91cx42_driver *bridge,
- struct pci_dev *pdev)
-{
- struct vme_bridge *ca91cx42_bridge;
-
- /* Disable interrupts from PCI to VME */
- iowrite32(0, bridge->base + VINT_EN);
-
- /* Disable PCI interrupts */
- iowrite32(0, bridge->base + LINT_EN);
- /* Clear Any Pending PCI Interrupts */
- iowrite32(0x00FFFFFF, bridge->base + LINT_STAT);
-
- ca91cx42_bridge = container_of((void *)bridge, struct vme_bridge,
- driver_priv);
- free_irq(pdev->irq, ca91cx42_bridge);
-}
-
-static int ca91cx42_iack_received(struct ca91cx42_driver *bridge, int level)
-{
- u32 tmp;
-
- tmp = ioread32(bridge->base + LINT_STAT);
-
- if (tmp & (1 << level))
- return 0;
- else
- return 1;
-}
-
-/*
- * Set up an VME interrupt
- */
-static void ca91cx42_irq_set(struct vme_bridge *ca91cx42_bridge, int level,
- int state, int sync)
-
-{
- struct pci_dev *pdev;
- u32 tmp;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- /* Enable IRQ level */
- tmp = ioread32(bridge->base + LINT_EN);
-
- if (state == 0)
- tmp &= ~CA91CX42_LINT_VIRQ[level];
- else
- tmp |= CA91CX42_LINT_VIRQ[level];
-
- iowrite32(tmp, bridge->base + LINT_EN);
-
- if ((state == 0) && (sync != 0)) {
- pdev = to_pci_dev(ca91cx42_bridge->parent);
-
- synchronize_irq(pdev->irq);
- }
-}
-
-static int ca91cx42_irq_generate(struct vme_bridge *ca91cx42_bridge, int level,
- int statid)
-{
- u32 tmp;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- /* Universe can only generate even vectors */
- if (statid & 1)
- return -EINVAL;
-
- mutex_lock(&bridge->vme_int);
-
- tmp = ioread32(bridge->base + VINT_EN);
-
- /* Set Status/ID */
- iowrite32(statid << 24, bridge->base + STATID);
-
- /* Assert VMEbus IRQ */
- tmp = tmp | (1 << (level + 24));
- iowrite32(tmp, bridge->base + VINT_EN);
-
- /* Wait for IACK */
- wait_event_interruptible(bridge->iack_queue,
- ca91cx42_iack_received(bridge, level));
-
- /* Return interrupt to low state */
- tmp = ioread32(bridge->base + VINT_EN);
- tmp = tmp & ~(1 << (level + 24));
- iowrite32(tmp, bridge->base + VINT_EN);
-
- mutex_unlock(&bridge->vme_int);
-
- return 0;
-}
-
-static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
- unsigned long long vme_base, unsigned long long size,
- dma_addr_t pci_base, u32 aspace, u32 cycle)
-{
- unsigned int i, addr = 0, granularity;
- unsigned int temp_ctl = 0;
- unsigned int vme_bound, pci_offset;
- struct vme_bridge *ca91cx42_bridge;
- struct ca91cx42_driver *bridge;
-
- ca91cx42_bridge = image->parent;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- i = image->number;
-
- switch (aspace) {
- case VME_A16:
- addr |= CA91CX42_VSI_CTL_VAS_A16;
- break;
- case VME_A24:
- addr |= CA91CX42_VSI_CTL_VAS_A24;
- break;
- case VME_A32:
- addr |= CA91CX42_VSI_CTL_VAS_A32;
- break;
- case VME_USER1:
- addr |= CA91CX42_VSI_CTL_VAS_USER1;
- break;
- case VME_USER2:
- addr |= CA91CX42_VSI_CTL_VAS_USER2;
- break;
- case VME_A64:
- case VME_CRCSR:
- case VME_USER3:
- case VME_USER4:
- default:
- dev_err(ca91cx42_bridge->parent, "Invalid address space\n");
- return -EINVAL;
- break;
- }
-
- /*
- * Bound address is a valid address for the window, adjust
- * accordingly
- */
- vme_bound = vme_base + size;
- pci_offset = pci_base - vme_base;
-
- if ((i == 0) || (i == 4))
- granularity = 0x1000;
- else
- granularity = 0x10000;
-
- if (vme_base & (granularity - 1)) {
- dev_err(ca91cx42_bridge->parent, "Invalid VME base "
- "alignment\n");
- return -EINVAL;
- }
- if (vme_bound & (granularity - 1)) {
- dev_err(ca91cx42_bridge->parent, "Invalid VME bound "
- "alignment\n");
- return -EINVAL;
- }
- if (pci_offset & (granularity - 1)) {
- dev_err(ca91cx42_bridge->parent, "Invalid PCI Offset "
- "alignment\n");
- return -EINVAL;
- }
-
- /* Disable while we are mucking around */
- temp_ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]);
- temp_ctl &= ~CA91CX42_VSI_CTL_EN;
- iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]);
-
- /* Setup mapping */
- iowrite32(vme_base, bridge->base + CA91CX42_VSI_BS[i]);
- iowrite32(vme_bound, bridge->base + CA91CX42_VSI_BD[i]);
- iowrite32(pci_offset, bridge->base + CA91CX42_VSI_TO[i]);
-
- /* Setup address space */
- temp_ctl &= ~CA91CX42_VSI_CTL_VAS_M;
- temp_ctl |= addr;
-
- /* Setup cycle types */
- temp_ctl &= ~(CA91CX42_VSI_CTL_PGM_M | CA91CX42_VSI_CTL_SUPER_M);
- if (cycle & VME_SUPER)
- temp_ctl |= CA91CX42_VSI_CTL_SUPER_SUPR;
- if (cycle & VME_USER)
- temp_ctl |= CA91CX42_VSI_CTL_SUPER_NPRIV;
- if (cycle & VME_PROG)
- temp_ctl |= CA91CX42_VSI_CTL_PGM_PGM;
- if (cycle & VME_DATA)
- temp_ctl |= CA91CX42_VSI_CTL_PGM_DATA;
-
- /* Write ctl reg without enable */
- iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]);
-
- if (enabled)
- temp_ctl |= CA91CX42_VSI_CTL_EN;
-
- iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]);
-
- return 0;
-}
-
-static int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled,
- unsigned long long *vme_base, unsigned long long *size,
- dma_addr_t *pci_base, u32 *aspace, u32 *cycle)
-{
- unsigned int i, granularity = 0, ctl = 0;
- unsigned long long vme_bound, pci_offset;
- struct ca91cx42_driver *bridge;
-
- bridge = image->parent->driver_priv;
-
- i = image->number;
-
- if ((i == 0) || (i == 4))
- granularity = 0x1000;
- else
- granularity = 0x10000;
-
- /* Read Registers */
- ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]);
-
- *vme_base = ioread32(bridge->base + CA91CX42_VSI_BS[i]);
- vme_bound = ioread32(bridge->base + CA91CX42_VSI_BD[i]);
- pci_offset = ioread32(bridge->base + CA91CX42_VSI_TO[i]);
-
- *pci_base = (dma_addr_t)*vme_base + pci_offset;
- *size = (unsigned long long)((vme_bound - *vme_base) + granularity);
-
- *enabled = 0;
- *aspace = 0;
- *cycle = 0;
-
- if (ctl & CA91CX42_VSI_CTL_EN)
- *enabled = 1;
-
- if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A16)
- *aspace = VME_A16;
- if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A24)
- *aspace = VME_A24;
- if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A32)
- *aspace = VME_A32;
- if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_USER1)
- *aspace = VME_USER1;
- if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_USER2)
- *aspace = VME_USER2;
-
- if (ctl & CA91CX42_VSI_CTL_SUPER_SUPR)
- *cycle |= VME_SUPER;
- if (ctl & CA91CX42_VSI_CTL_SUPER_NPRIV)
- *cycle |= VME_USER;
- if (ctl & CA91CX42_VSI_CTL_PGM_PGM)
- *cycle |= VME_PROG;
- if (ctl & CA91CX42_VSI_CTL_PGM_DATA)
- *cycle |= VME_DATA;
-
- return 0;
-}
-
-/*
- * Allocate and map PCI Resource
- */
-static int ca91cx42_alloc_resource(struct vme_master_resource *image,
- unsigned long long size)
-{
- unsigned long long existing_size;
- int retval = 0;
- struct pci_dev *pdev;
- struct vme_bridge *ca91cx42_bridge;
-
- ca91cx42_bridge = image->parent;
-
- /* Find pci_dev container of dev */
- if (!ca91cx42_bridge->parent) {
- dev_err(ca91cx42_bridge->parent, "Dev entry NULL\n");
- return -EINVAL;
- }
- pdev = to_pci_dev(ca91cx42_bridge->parent);
-
- existing_size = (unsigned long long)(image->bus_resource.end -
- image->bus_resource.start);
-
- /* If the existing size is OK, return */
- if (existing_size == (size - 1))
- return 0;
-
- if (existing_size != 0) {
- iounmap(image->kern_base);
- image->kern_base = NULL;
- kfree(image->bus_resource.name);
- release_resource(&image->bus_resource);
- memset(&image->bus_resource, 0, sizeof(image->bus_resource));
- }
-
- if (!image->bus_resource.name) {
- image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_ATOMIC);
- if (!image->bus_resource.name) {
- retval = -ENOMEM;
- goto err_name;
- }
- }
-
- sprintf((char *)image->bus_resource.name, "%s.%d",
- ca91cx42_bridge->name, image->number);
-
- image->bus_resource.start = 0;
- image->bus_resource.end = (unsigned long)size;
- image->bus_resource.flags = IORESOURCE_MEM;
-
- retval = pci_bus_alloc_resource(pdev->bus,
- &image->bus_resource, size, 0x10000, PCIBIOS_MIN_MEM,
- 0, NULL, NULL);
- if (retval) {
- dev_err(ca91cx42_bridge->parent, "Failed to allocate mem "
- "resource for window %d size 0x%lx start 0x%lx\n",
- image->number, (unsigned long)size,
- (unsigned long)image->bus_resource.start);
- goto err_resource;
- }
-
- image->kern_base = ioremap(
- image->bus_resource.start, size);
- if (!image->kern_base) {
- dev_err(ca91cx42_bridge->parent, "Failed to remap resource\n");
- retval = -ENOMEM;
- goto err_remap;
- }
-
- return 0;
-
-err_remap:
- release_resource(&image->bus_resource);
-err_resource:
- kfree(image->bus_resource.name);
- memset(&image->bus_resource, 0, sizeof(image->bus_resource));
-err_name:
- return retval;
-}
-
-/*
- * Free and unmap PCI Resource
- */
-static void ca91cx42_free_resource(struct vme_master_resource *image)
-{
- iounmap(image->kern_base);
- image->kern_base = NULL;
- release_resource(&image->bus_resource);
- kfree(image->bus_resource.name);
- memset(&image->bus_resource, 0, sizeof(image->bus_resource));
-}
-
-
-static int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
- unsigned long long vme_base, unsigned long long size, u32 aspace,
- u32 cycle, u32 dwidth)
-{
- int retval = 0;
- unsigned int i, granularity = 0;
- unsigned int temp_ctl = 0;
- unsigned long long pci_bound, vme_offset, pci_base;
- struct vme_bridge *ca91cx42_bridge;
- struct ca91cx42_driver *bridge;
-
- ca91cx42_bridge = image->parent;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- i = image->number;
-
- if ((i == 0) || (i == 4))
- granularity = 0x1000;
- else
- granularity = 0x10000;
-
- /* Verify input data */
- if (vme_base & (granularity - 1)) {
- dev_err(ca91cx42_bridge->parent, "Invalid VME Window "
- "alignment\n");
- retval = -EINVAL;
- goto err_window;
- }
- if (size & (granularity - 1)) {
- dev_err(ca91cx42_bridge->parent, "Invalid VME Window "
- "alignment\n");
- retval = -EINVAL;
- goto err_window;
- }
-
- spin_lock(&image->lock);
-
- /*
- * Let's allocate the resource here rather than further up the stack as
- * it avoids pushing loads of bus dependent stuff up the stack
- */
- retval = ca91cx42_alloc_resource(image, size);
- if (retval) {
- spin_unlock(&image->lock);
- dev_err(ca91cx42_bridge->parent, "Unable to allocate memory "
- "for resource name\n");
- retval = -ENOMEM;
- goto err_res;
- }
-
- pci_base = (unsigned long long)image->bus_resource.start;
-
- /*
- * Bound address is a valid address for the window, adjust
- * according to window granularity.
- */
- pci_bound = pci_base + size;
- vme_offset = vme_base - pci_base;
-
- /* Disable while we are mucking around */
- temp_ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]);
- temp_ctl &= ~CA91CX42_LSI_CTL_EN;
- iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]);
-
- /* Setup cycle types */
- temp_ctl &= ~CA91CX42_LSI_CTL_VCT_M;
- if (cycle & VME_BLT)
- temp_ctl |= CA91CX42_LSI_CTL_VCT_BLT;
- if (cycle & VME_MBLT)
- temp_ctl |= CA91CX42_LSI_CTL_VCT_MBLT;
-
- /* Setup data width */
- temp_ctl &= ~CA91CX42_LSI_CTL_VDW_M;
- switch (dwidth) {
- case VME_D8:
- temp_ctl |= CA91CX42_LSI_CTL_VDW_D8;
- break;
- case VME_D16:
- temp_ctl |= CA91CX42_LSI_CTL_VDW_D16;
- break;
- case VME_D32:
- temp_ctl |= CA91CX42_LSI_CTL_VDW_D32;
- break;
- case VME_D64:
- temp_ctl |= CA91CX42_LSI_CTL_VDW_D64;
- break;
- default:
- spin_unlock(&image->lock);
- dev_err(ca91cx42_bridge->parent, "Invalid data width\n");
- retval = -EINVAL;
- goto err_dwidth;
- break;
- }
-
- /* Setup address space */
- temp_ctl &= ~CA91CX42_LSI_CTL_VAS_M;
- switch (aspace) {
- case VME_A16:
- temp_ctl |= CA91CX42_LSI_CTL_VAS_A16;
- break;
- case VME_A24:
- temp_ctl |= CA91CX42_LSI_CTL_VAS_A24;
- break;
- case VME_A32:
- temp_ctl |= CA91CX42_LSI_CTL_VAS_A32;
- break;
- case VME_CRCSR:
- temp_ctl |= CA91CX42_LSI_CTL_VAS_CRCSR;
- break;
- case VME_USER1:
- temp_ctl |= CA91CX42_LSI_CTL_VAS_USER1;
- break;
- case VME_USER2:
- temp_ctl |= CA91CX42_LSI_CTL_VAS_USER2;
- break;
- case VME_A64:
- case VME_USER3:
- case VME_USER4:
- default:
- spin_unlock(&image->lock);
- dev_err(ca91cx42_bridge->parent, "Invalid address space\n");
- retval = -EINVAL;
- goto err_aspace;
- break;
- }
-
- temp_ctl &= ~(CA91CX42_LSI_CTL_PGM_M | CA91CX42_LSI_CTL_SUPER_M);
- if (cycle & VME_SUPER)
- temp_ctl |= CA91CX42_LSI_CTL_SUPER_SUPR;
- if (cycle & VME_PROG)
- temp_ctl |= CA91CX42_LSI_CTL_PGM_PGM;
-
- /* Setup mapping */
- iowrite32(pci_base, bridge->base + CA91CX42_LSI_BS[i]);
- iowrite32(pci_bound, bridge->base + CA91CX42_LSI_BD[i]);
- iowrite32(vme_offset, bridge->base + CA91CX42_LSI_TO[i]);
-
- /* Write ctl reg without enable */
- iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]);
-
- if (enabled)
- temp_ctl |= CA91CX42_LSI_CTL_EN;
-
- iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]);
-
- spin_unlock(&image->lock);
- return 0;
-
-err_aspace:
-err_dwidth:
- ca91cx42_free_resource(image);
-err_res:
-err_window:
- return retval;
-}
-
-static int __ca91cx42_master_get(struct vme_master_resource *image,
- int *enabled, unsigned long long *vme_base, unsigned long long *size,
- u32 *aspace, u32 *cycle, u32 *dwidth)
-{
- unsigned int i, ctl;
- unsigned long long pci_base, pci_bound, vme_offset;
- struct ca91cx42_driver *bridge;
-
- bridge = image->parent->driver_priv;
-
- i = image->number;
-
- ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]);
-
- pci_base = ioread32(bridge->base + CA91CX42_LSI_BS[i]);
- vme_offset = ioread32(bridge->base + CA91CX42_LSI_TO[i]);
- pci_bound = ioread32(bridge->base + CA91CX42_LSI_BD[i]);
-
- *vme_base = pci_base + vme_offset;
- *size = (unsigned long long)(pci_bound - pci_base);
-
- *enabled = 0;
- *aspace = 0;
- *cycle = 0;
- *dwidth = 0;
-
- if (ctl & CA91CX42_LSI_CTL_EN)
- *enabled = 1;
-
- /* Setup address space */
- switch (ctl & CA91CX42_LSI_CTL_VAS_M) {
- case CA91CX42_LSI_CTL_VAS_A16:
- *aspace = VME_A16;
- break;
- case CA91CX42_LSI_CTL_VAS_A24:
- *aspace = VME_A24;
- break;
- case CA91CX42_LSI_CTL_VAS_A32:
- *aspace = VME_A32;
- break;
- case CA91CX42_LSI_CTL_VAS_CRCSR:
- *aspace = VME_CRCSR;
- break;
- case CA91CX42_LSI_CTL_VAS_USER1:
- *aspace = VME_USER1;
- break;
- case CA91CX42_LSI_CTL_VAS_USER2:
- *aspace = VME_USER2;
- break;
- }
-
- /* XXX Not sure howto check for MBLT */
- /* Setup cycle types */
- if (ctl & CA91CX42_LSI_CTL_VCT_BLT)
- *cycle |= VME_BLT;
- else
- *cycle |= VME_SCT;
-
- if (ctl & CA91CX42_LSI_CTL_SUPER_SUPR)
- *cycle |= VME_SUPER;
- else
- *cycle |= VME_USER;
-
- if (ctl & CA91CX42_LSI_CTL_PGM_PGM)
- *cycle = VME_PROG;
- else
- *cycle = VME_DATA;
-
- /* Setup data width */
- switch (ctl & CA91CX42_LSI_CTL_VDW_M) {
- case CA91CX42_LSI_CTL_VDW_D8:
- *dwidth = VME_D8;
- break;
- case CA91CX42_LSI_CTL_VDW_D16:
- *dwidth = VME_D16;
- break;
- case CA91CX42_LSI_CTL_VDW_D32:
- *dwidth = VME_D32;
- break;
- case CA91CX42_LSI_CTL_VDW_D64:
- *dwidth = VME_D64;
- break;
- }
-
- return 0;
-}
-
-static int ca91cx42_master_get(struct vme_master_resource *image, int *enabled,
- unsigned long long *vme_base, unsigned long long *size, u32 *aspace,
- u32 *cycle, u32 *dwidth)
-{
- int retval;
-
- spin_lock(&image->lock);
-
- retval = __ca91cx42_master_get(image, enabled, vme_base, size, aspace,
- cycle, dwidth);
-
- spin_unlock(&image->lock);
-
- return retval;
-}
-
-static ssize_t ca91cx42_master_read(struct vme_master_resource *image,
- void *buf, size_t count, loff_t offset)
-{
- ssize_t retval;
- void __iomem *addr = image->kern_base + offset;
- unsigned int done = 0;
- unsigned int count32;
-
- if (count == 0)
- return 0;
-
- spin_lock(&image->lock);
-
- /* The following code handles VME address alignment. We cannot use
- * memcpy_xxx here because it may cut data transfers in to 8-bit
- * cycles when D16 or D32 cycles are required on the VME bus.
- * On the other hand, the bridge itself assures that the maximum data
- * cycle configured for the transfer is used and splits it
- * automatically for non-aligned addresses, so we don't want the
- * overhead of needlessly forcing small transfers for the entire cycle.
- */
- if ((uintptr_t)addr & 0x1) {
- *(u8 *)buf = ioread8(addr);
- done += 1;
- if (done == count)
- goto out;
- }
- if ((uintptr_t)(addr + done) & 0x2) {
- if ((count - done) < 2) {
- *(u8 *)(buf + done) = ioread8(addr + done);
- done += 1;
- goto out;
- } else {
- *(u16 *)(buf + done) = ioread16(addr + done);
- done += 2;
- }
- }
-
- count32 = (count - done) & ~0x3;
- while (done < count32) {
- *(u32 *)(buf + done) = ioread32(addr + done);
- done += 4;
- }
-
- if ((count - done) & 0x2) {
- *(u16 *)(buf + done) = ioread16(addr + done);
- done += 2;
- }
- if ((count - done) & 0x1) {
- *(u8 *)(buf + done) = ioread8(addr + done);
- done += 1;
- }
-out:
- retval = count;
- spin_unlock(&image->lock);
-
- return retval;
-}
-
-static ssize_t ca91cx42_master_write(struct vme_master_resource *image,
- void *buf, size_t count, loff_t offset)
-{
- ssize_t retval;
- void __iomem *addr = image->kern_base + offset;
- unsigned int done = 0;
- unsigned int count32;
-
- if (count == 0)
- return 0;
-
- spin_lock(&image->lock);
-
- /* Here we apply for the same strategy we do in master_read
- * function in order to assure the correct cycles.
- */
- if ((uintptr_t)addr & 0x1) {
- iowrite8(*(u8 *)buf, addr);
- done += 1;
- if (done == count)
- goto out;
- }
- if ((uintptr_t)(addr + done) & 0x2) {
- if ((count - done) < 2) {
- iowrite8(*(u8 *)(buf + done), addr + done);
- done += 1;
- goto out;
- } else {
- iowrite16(*(u16 *)(buf + done), addr + done);
- done += 2;
- }
- }
-
- count32 = (count - done) & ~0x3;
- while (done < count32) {
- iowrite32(*(u32 *)(buf + done), addr + done);
- done += 4;
- }
-
- if ((count - done) & 0x2) {
- iowrite16(*(u16 *)(buf + done), addr + done);
- done += 2;
- }
- if ((count - done) & 0x1) {
- iowrite8(*(u8 *)(buf + done), addr + done);
- done += 1;
- }
-out:
- retval = count;
-
- spin_unlock(&image->lock);
-
- return retval;
-}
-
-static unsigned int ca91cx42_master_rmw(struct vme_master_resource *image,
- unsigned int mask, unsigned int compare, unsigned int swap,
- loff_t offset)
-{
- u32 result;
- uintptr_t pci_addr;
- struct ca91cx42_driver *bridge;
- struct device *dev;
-
- bridge = image->parent->driver_priv;
- dev = image->parent->parent;
-
- /* Find the PCI address that maps to the desired VME address */
-
- /* Locking as we can only do one of these at a time */
- mutex_lock(&bridge->vme_rmw);
-
- /* Lock image */
- spin_lock(&image->lock);
-
- pci_addr = (uintptr_t)image->kern_base + offset;
-
- /* Address must be 4-byte aligned */
- if (pci_addr & 0x3) {
- dev_err(dev, "RMW Address not 4-byte aligned\n");
- result = -EINVAL;
- goto out;
- }
-
- /* Ensure RMW Disabled whilst configuring */
- iowrite32(0, bridge->base + SCYC_CTL);
-
- /* Configure registers */
- iowrite32(mask, bridge->base + SCYC_EN);
- iowrite32(compare, bridge->base + SCYC_CMP);
- iowrite32(swap, bridge->base + SCYC_SWP);
- iowrite32(pci_addr, bridge->base + SCYC_ADDR);
-
- /* Enable RMW */
- iowrite32(CA91CX42_SCYC_CTL_CYC_RMW, bridge->base + SCYC_CTL);
-
- /* Kick process off with a read to the required address. */
- result = ioread32(image->kern_base + offset);
-
- /* Disable RMW */
- iowrite32(0, bridge->base + SCYC_CTL);
-
-out:
- spin_unlock(&image->lock);
-
- mutex_unlock(&bridge->vme_rmw);
-
- return result;
-}
-
-static int ca91cx42_dma_list_add(struct vme_dma_list *list,
- struct vme_dma_attr *src, struct vme_dma_attr *dest, size_t count)
-{
- struct ca91cx42_dma_entry *entry, *prev;
- struct vme_dma_pci *pci_attr;
- struct vme_dma_vme *vme_attr;
- dma_addr_t desc_ptr;
- int retval = 0;
- struct device *dev;
-
- dev = list->parent->parent->parent;
-
- /* XXX descriptor must be aligned on 64-bit boundaries */
- entry = kmalloc(sizeof(*entry), GFP_KERNEL);
- if (!entry) {
- retval = -ENOMEM;
- goto err_mem;
- }
-
- /* Test descriptor alignment */
- if ((unsigned long)&entry->descriptor & CA91CX42_DCPP_M) {
- dev_err(dev, "Descriptor not aligned to 16 byte boundary as "
- "required: %p\n", &entry->descriptor);
- retval = -EINVAL;
- goto err_align;
- }
-
- memset(&entry->descriptor, 0, sizeof(entry->descriptor));
-
- if (dest->type == VME_DMA_VME) {
- entry->descriptor.dctl |= CA91CX42_DCTL_L2V;
- vme_attr = dest->private;
- pci_attr = src->private;
- } else {
- vme_attr = src->private;
- pci_attr = dest->private;
- }
-
- /* Check we can do fulfill required attributes */
- if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 |
- VME_USER2)) != 0) {
-
- dev_err(dev, "Unsupported cycle type\n");
- retval = -EINVAL;
- goto err_aspace;
- }
-
- if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER |
- VME_PROG | VME_DATA)) != 0) {
-
- dev_err(dev, "Unsupported cycle type\n");
- retval = -EINVAL;
- goto err_cycle;
- }
-
- /* Check to see if we can fulfill source and destination */
- if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) ||
- ((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) {
-
- dev_err(dev, "Cannot perform transfer with this "
- "source-destination combination\n");
- retval = -EINVAL;
- goto err_direct;
- }
-
- /* Setup cycle types */
- if (vme_attr->cycle & VME_BLT)
- entry->descriptor.dctl |= CA91CX42_DCTL_VCT_BLT;
-
- /* Setup data width */
- switch (vme_attr->dwidth) {
- case VME_D8:
- entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D8;
- break;
- case VME_D16:
- entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D16;
- break;
- case VME_D32:
- entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D32;
- break;
- case VME_D64:
- entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64;
- break;
- default:
- dev_err(dev, "Invalid data width\n");
- return -EINVAL;
- }
-
- /* Setup address space */
- switch (vme_attr->aspace) {
- case VME_A16:
- entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A16;
- break;
- case VME_A24:
- entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A24;
- break;
- case VME_A32:
- entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A32;
- break;
- case VME_USER1:
- entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER1;
- break;
- case VME_USER2:
- entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2;
- break;
- default:
- dev_err(dev, "Invalid address space\n");
- return -EINVAL;
- break;
- }
-
- if (vme_attr->cycle & VME_SUPER)
- entry->descriptor.dctl |= CA91CX42_DCTL_SUPER_SUPR;
- if (vme_attr->cycle & VME_PROG)
- entry->descriptor.dctl |= CA91CX42_DCTL_PGM_PGM;
-
- entry->descriptor.dtbc = count;
- entry->descriptor.dla = pci_attr->address;
- entry->descriptor.dva = vme_attr->address;
- entry->descriptor.dcpp = CA91CX42_DCPP_NULL;
-
- /* Add to list */
- list_add_tail(&entry->list, &list->entries);
-
- /* Fill out previous descriptors "Next Address" */
- if (entry->list.prev != &list->entries) {
- prev = list_entry(entry->list.prev, struct ca91cx42_dma_entry,
- list);
- /* We need the bus address for the pointer */
- desc_ptr = virt_to_bus(&entry->descriptor);
- prev->descriptor.dcpp = desc_ptr & ~CA91CX42_DCPP_M;
- }
-
- return 0;
-
-err_cycle:
-err_aspace:
-err_direct:
-err_align:
- kfree(entry);
-err_mem:
- return retval;
-}
-
-static int ca91cx42_dma_busy(struct vme_bridge *ca91cx42_bridge)
-{
- u32 tmp;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- tmp = ioread32(bridge->base + DGCS);
-
- if (tmp & CA91CX42_DGCS_ACT)
- return 0;
- else
- return 1;
-}
-
-static int ca91cx42_dma_list_exec(struct vme_dma_list *list)
-{
- struct vme_dma_resource *ctrlr;
- struct ca91cx42_dma_entry *entry;
- int retval;
- dma_addr_t bus_addr;
- u32 val;
- struct device *dev;
- struct ca91cx42_driver *bridge;
-
- ctrlr = list->parent;
-
- bridge = ctrlr->parent->driver_priv;
- dev = ctrlr->parent->parent;
-
- mutex_lock(&ctrlr->mtx);
-
- if (!(list_empty(&ctrlr->running))) {
- /*
- * XXX We have an active DMA transfer and currently haven't
- * sorted out the mechanism for "pending" DMA transfers.
- * Return busy.
- */
- /* Need to add to pending here */
- mutex_unlock(&ctrlr->mtx);
- return -EBUSY;
- } else {
- list_add(&list->list, &ctrlr->running);
- }
-
- /* Get first bus address and write into registers */
- entry = list_first_entry(&list->entries, struct ca91cx42_dma_entry,
- list);
-
- bus_addr = virt_to_bus(&entry->descriptor);
-
- mutex_unlock(&ctrlr->mtx);
-
- iowrite32(0, bridge->base + DTBC);
- iowrite32(bus_addr & ~CA91CX42_DCPP_M, bridge->base + DCPP);
-
- /* Start the operation */
- val = ioread32(bridge->base + DGCS);
-
- /* XXX Could set VMEbus On and Off Counters here */
- val &= (CA91CX42_DGCS_VON_M | CA91CX42_DGCS_VOFF_M);
-
- val |= (CA91CX42_DGCS_CHAIN | CA91CX42_DGCS_STOP | CA91CX42_DGCS_HALT |
- CA91CX42_DGCS_DONE | CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR |
- CA91CX42_DGCS_PERR);
-
- iowrite32(val, bridge->base + DGCS);
-
- val |= CA91CX42_DGCS_GO;
-
- iowrite32(val, bridge->base + DGCS);
-
- retval = wait_event_interruptible(bridge->dma_queue,
- ca91cx42_dma_busy(ctrlr->parent));
-
- if (retval) {
- val = ioread32(bridge->base + DGCS);
- iowrite32(val | CA91CX42_DGCS_STOP_REQ, bridge->base + DGCS);
- /* Wait for the operation to abort */
- wait_event(bridge->dma_queue,
- ca91cx42_dma_busy(ctrlr->parent));
- retval = -EINTR;
- goto exit;
- }
-
- /*
- * Read status register, this register is valid until we kick off a
- * new transfer.
- */
- val = ioread32(bridge->base + DGCS);
-
- if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR |
- CA91CX42_DGCS_PERR)) {
-
- dev_err(dev, "ca91c042: DMA Error. DGCS=%08X\n", val);
- val = ioread32(bridge->base + DCTL);
- retval = -EIO;
- }
-
-exit:
- /* Remove list from running list */
- mutex_lock(&ctrlr->mtx);
- list_del(&list->list);
- mutex_unlock(&ctrlr->mtx);
-
- return retval;
-
-}
-
-static int ca91cx42_dma_list_empty(struct vme_dma_list *list)
-{
- struct list_head *pos, *temp;
- struct ca91cx42_dma_entry *entry;
-
- /* detach and free each entry */
- list_for_each_safe(pos, temp, &list->entries) {
- list_del(pos);
- entry = list_entry(pos, struct ca91cx42_dma_entry, list);
- kfree(entry);
- }
-
- return 0;
-}
-
-/*
- * All 4 location monitors reside at the same base - this is therefore a
- * system wide configuration.
- *
- * This does not enable the LM monitor - that should be done when the first
- * callback is attached and disabled when the last callback is removed.
- */
-static int ca91cx42_lm_set(struct vme_lm_resource *lm,
- unsigned long long lm_base, u32 aspace, u32 cycle)
-{
- u32 temp_base, lm_ctl = 0;
- int i;
- struct ca91cx42_driver *bridge;
- struct device *dev;
-
- bridge = lm->parent->driver_priv;
- dev = lm->parent->parent;
-
- /* Check the alignment of the location monitor */
- temp_base = (u32)lm_base;
- if (temp_base & 0xffff) {
- dev_err(dev, "Location monitor must be aligned to 64KB "
- "boundary");
- return -EINVAL;
- }
-
- mutex_lock(&lm->mtx);
-
- /* If we already have a callback attached, we can't move it! */
- for (i = 0; i < lm->monitors; i++) {
- if (bridge->lm_callback[i]) {
- mutex_unlock(&lm->mtx);
- dev_err(dev, "Location monitor callback attached, "
- "can't reset\n");
- return -EBUSY;
- }
- }
-
- switch (aspace) {
- case VME_A16:
- lm_ctl |= CA91CX42_LM_CTL_AS_A16;
- break;
- case VME_A24:
- lm_ctl |= CA91CX42_LM_CTL_AS_A24;
- break;
- case VME_A32:
- lm_ctl |= CA91CX42_LM_CTL_AS_A32;
- break;
- default:
- mutex_unlock(&lm->mtx);
- dev_err(dev, "Invalid address space\n");
- return -EINVAL;
- break;
- }
-
- if (cycle & VME_SUPER)
- lm_ctl |= CA91CX42_LM_CTL_SUPR;
- if (cycle & VME_USER)
- lm_ctl |= CA91CX42_LM_CTL_NPRIV;
- if (cycle & VME_PROG)
- lm_ctl |= CA91CX42_LM_CTL_PGM;
- if (cycle & VME_DATA)
- lm_ctl |= CA91CX42_LM_CTL_DATA;
-
- iowrite32(lm_base, bridge->base + LM_BS);
- iowrite32(lm_ctl, bridge->base + LM_CTL);
-
- mutex_unlock(&lm->mtx);
-
- return 0;
-}
-
-/* Get configuration of the callback monitor and return whether it is enabled
- * or disabled.
- */
-static int ca91cx42_lm_get(struct vme_lm_resource *lm,
- unsigned long long *lm_base, u32 *aspace, u32 *cycle)
-{
- u32 lm_ctl, enabled = 0;
- struct ca91cx42_driver *bridge;
-
- bridge = lm->parent->driver_priv;
-
- mutex_lock(&lm->mtx);
-
- *lm_base = (unsigned long long)ioread32(bridge->base + LM_BS);
- lm_ctl = ioread32(bridge->base + LM_CTL);
-
- if (lm_ctl & CA91CX42_LM_CTL_EN)
- enabled = 1;
-
- if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A16)
- *aspace = VME_A16;
- if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A24)
- *aspace = VME_A24;
- if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A32)
- *aspace = VME_A32;
-
- *cycle = 0;
- if (lm_ctl & CA91CX42_LM_CTL_SUPR)
- *cycle |= VME_SUPER;
- if (lm_ctl & CA91CX42_LM_CTL_NPRIV)
- *cycle |= VME_USER;
- if (lm_ctl & CA91CX42_LM_CTL_PGM)
- *cycle |= VME_PROG;
- if (lm_ctl & CA91CX42_LM_CTL_DATA)
- *cycle |= VME_DATA;
-
- mutex_unlock(&lm->mtx);
-
- return enabled;
-}
-
-/*
- * Attach a callback to a specific location monitor.
- *
- * Callback will be passed the monitor triggered.
- */
-static int ca91cx42_lm_attach(struct vme_lm_resource *lm, int monitor,
- void (*callback)(void *), void *data)
-{
- u32 lm_ctl, tmp;
- struct ca91cx42_driver *bridge;
- struct device *dev;
-
- bridge = lm->parent->driver_priv;
- dev = lm->parent->parent;
-
- mutex_lock(&lm->mtx);
-
- /* Ensure that the location monitor is configured - need PGM or DATA */
- lm_ctl = ioread32(bridge->base + LM_CTL);
- if ((lm_ctl & (CA91CX42_LM_CTL_PGM | CA91CX42_LM_CTL_DATA)) == 0) {
- mutex_unlock(&lm->mtx);
- dev_err(dev, "Location monitor not properly configured\n");
- return -EINVAL;
- }
-
- /* Check that a callback isn't already attached */
- if (bridge->lm_callback[monitor]) {
- mutex_unlock(&lm->mtx);
- dev_err(dev, "Existing callback attached\n");
- return -EBUSY;
- }
-
- /* Attach callback */
- bridge->lm_callback[monitor] = callback;
- bridge->lm_data[monitor] = data;
-
- /* Enable Location Monitor interrupt */
- tmp = ioread32(bridge->base + LINT_EN);
- tmp |= CA91CX42_LINT_LM[monitor];
- iowrite32(tmp, bridge->base + LINT_EN);
-
- /* Ensure that global Location Monitor Enable set */
- if ((lm_ctl & CA91CX42_LM_CTL_EN) == 0) {
- lm_ctl |= CA91CX42_LM_CTL_EN;
- iowrite32(lm_ctl, bridge->base + LM_CTL);
- }
-
- mutex_unlock(&lm->mtx);
-
- return 0;
-}
-
-/*
- * Detach a callback function forn a specific location monitor.
- */
-static int ca91cx42_lm_detach(struct vme_lm_resource *lm, int monitor)
-{
- u32 tmp;
- struct ca91cx42_driver *bridge;
-
- bridge = lm->parent->driver_priv;
-
- mutex_lock(&lm->mtx);
-
- /* Disable Location Monitor and ensure previous interrupts are clear */
- tmp = ioread32(bridge->base + LINT_EN);
- tmp &= ~CA91CX42_LINT_LM[monitor];
- iowrite32(tmp, bridge->base + LINT_EN);
-
- iowrite32(CA91CX42_LINT_LM[monitor],
- bridge->base + LINT_STAT);
-
- /* Detach callback */
- bridge->lm_callback[monitor] = NULL;
- bridge->lm_data[monitor] = NULL;
-
- /* If all location monitors disabled, disable global Location Monitor */
- if ((tmp & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 |
- CA91CX42_LINT_LM3)) == 0) {
- tmp = ioread32(bridge->base + LM_CTL);
- tmp &= ~CA91CX42_LM_CTL_EN;
- iowrite32(tmp, bridge->base + LM_CTL);
- }
-
- mutex_unlock(&lm->mtx);
-
- return 0;
-}
-
-static int ca91cx42_slot_get(struct vme_bridge *ca91cx42_bridge)
-{
- u32 slot = 0;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- if (!geoid) {
- slot = ioread32(bridge->base + VCSR_BS);
- slot = ((slot & CA91CX42_VCSR_BS_SLOT_M) >> 27);
- } else
- slot = geoid;
-
- return (int)slot;
-
-}
-
-static void *ca91cx42_alloc_consistent(struct device *parent, size_t size,
- dma_addr_t *dma)
-{
- struct pci_dev *pdev;
-
- /* Find pci_dev container of dev */
- pdev = to_pci_dev(parent);
-
- return dma_alloc_coherent(&pdev->dev, size, dma, GFP_KERNEL);
-}
-
-static void ca91cx42_free_consistent(struct device *parent, size_t size,
- void *vaddr, dma_addr_t dma)
-{
- struct pci_dev *pdev;
-
- /* Find pci_dev container of dev */
- pdev = to_pci_dev(parent);
-
- dma_free_coherent(&pdev->dev, size, vaddr, dma);
-}
-
-/*
- * Configure CR/CSR space
- *
- * Access to the CR/CSR can be configured at power-up. The location of the
- * CR/CSR registers in the CR/CSR address space is determined by the boards
- * Auto-ID or Geographic address. This function ensures that the window is
- * enabled at an offset consistent with the boards geopgraphic address.
- */
-static int ca91cx42_crcsr_init(struct vme_bridge *ca91cx42_bridge,
- struct pci_dev *pdev)
-{
- unsigned int crcsr_addr;
- int tmp, slot;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- slot = ca91cx42_slot_get(ca91cx42_bridge);
-
- /* Write CSR Base Address if slot ID is supplied as a module param */
- if (geoid)
- iowrite32(geoid << 27, bridge->base + VCSR_BS);
-
- dev_info(&pdev->dev, "CR/CSR Offset: %d\n", slot);
- if (slot == 0) {
- dev_err(&pdev->dev, "Slot number is unset, not configuring "
- "CR/CSR space\n");
- return -EINVAL;
- }
-
- /* Allocate mem for CR/CSR image */
- bridge->crcsr_kernel = dma_alloc_coherent(&pdev->dev,
- VME_CRCSR_BUF_SIZE,
- &bridge->crcsr_bus, GFP_KERNEL);
- if (!bridge->crcsr_kernel) {
- dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR "
- "image\n");
- return -ENOMEM;
- }
-
- crcsr_addr = slot * (512 * 1024);
- iowrite32(bridge->crcsr_bus - crcsr_addr, bridge->base + VCSR_TO);
-
- tmp = ioread32(bridge->base + VCSR_CTL);
- tmp |= CA91CX42_VCSR_CTL_EN;
- iowrite32(tmp, bridge->base + VCSR_CTL);
-
- return 0;
-}
-
-static void ca91cx42_crcsr_exit(struct vme_bridge *ca91cx42_bridge,
- struct pci_dev *pdev)
-{
- u32 tmp;
- struct ca91cx42_driver *bridge;
-
- bridge = ca91cx42_bridge->driver_priv;
-
- /* Turn off CR/CSR space */
- tmp = ioread32(bridge->base + VCSR_CTL);
- tmp &= ~CA91CX42_VCSR_CTL_EN;
- iowrite32(tmp, bridge->base + VCSR_CTL);
-
- /* Free image */
- iowrite32(0, bridge->base + VCSR_TO);
-
- dma_free_coherent(&pdev->dev, VME_CRCSR_BUF_SIZE,
- bridge->crcsr_kernel, bridge->crcsr_bus);
-}
-
-static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id)
-{
- int retval, i;
- u32 data;
- struct list_head *pos = NULL, *n;
- struct vme_bridge *ca91cx42_bridge;
- struct ca91cx42_driver *ca91cx42_device;
- struct vme_master_resource *master_image;
- struct vme_slave_resource *slave_image;
- struct vme_dma_resource *dma_ctrlr;
- struct vme_lm_resource *lm;
-
- /* We want to support more than one of each bridge so we need to
- * dynamically allocate the bridge structure
- */
- ca91cx42_bridge = kzalloc(sizeof(*ca91cx42_bridge), GFP_KERNEL);
- if (!ca91cx42_bridge) {
- retval = -ENOMEM;
- goto err_struct;
- }
- vme_init_bridge(ca91cx42_bridge);
-
- ca91cx42_device = kzalloc(sizeof(*ca91cx42_device), GFP_KERNEL);
- if (!ca91cx42_device) {
- retval = -ENOMEM;
- goto err_driver;
- }
-
- ca91cx42_bridge->driver_priv = ca91cx42_device;
-
- /* Enable the device */
- retval = pci_enable_device(pdev);
- if (retval) {
- dev_err(&pdev->dev, "Unable to enable device\n");
- goto err_enable;
- }
-
- /* Map Registers */
- retval = pci_request_regions(pdev, driver_name);
- if (retval) {
- dev_err(&pdev->dev, "Unable to reserve resources\n");
- goto err_resource;
- }
-
- /* map registers in BAR 0 */
- ca91cx42_device->base = ioremap(pci_resource_start(pdev, 0),
- 4096);
- if (!ca91cx42_device->base) {
- dev_err(&pdev->dev, "Unable to remap CRG region\n");
- retval = -EIO;
- goto err_remap;
- }
-
- /* Check to see if the mapping worked out */
- data = ioread32(ca91cx42_device->base + CA91CX42_PCI_ID) & 0x0000FFFF;
- if (data != PCI_VENDOR_ID_TUNDRA) {
- dev_err(&pdev->dev, "PCI_ID check failed\n");
- retval = -EIO;
- goto err_test;
- }
-
- /* Initialize wait queues & mutual exclusion flags */
- init_waitqueue_head(&ca91cx42_device->dma_queue);
- init_waitqueue_head(&ca91cx42_device->iack_queue);
- mutex_init(&ca91cx42_device->vme_int);
- mutex_init(&ca91cx42_device->vme_rmw);
-
- ca91cx42_bridge->parent = &pdev->dev;
- strcpy(ca91cx42_bridge->name, driver_name);
-
- /* Setup IRQ */
- retval = ca91cx42_irq_init(ca91cx42_bridge);
- if (retval != 0) {
- dev_err(&pdev->dev, "Chip Initialization failed.\n");
- goto err_irq;
- }
-
- /* Add master windows to list */
- for (i = 0; i < CA91C142_MAX_MASTER; i++) {
- master_image = kmalloc(sizeof(*master_image), GFP_KERNEL);
- if (!master_image) {
- retval = -ENOMEM;
- goto err_master;
- }
- master_image->parent = ca91cx42_bridge;
- spin_lock_init(&master_image->lock);
- master_image->locked = 0;
- master_image->number = i;
- master_image->address_attr = VME_A16 | VME_A24 | VME_A32 |
- VME_CRCSR | VME_USER1 | VME_USER2;
- master_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT |
- VME_SUPER | VME_USER | VME_PROG | VME_DATA;
- master_image->width_attr = VME_D8 | VME_D16 | VME_D32 | VME_D64;
- memset(&master_image->bus_resource, 0,
- sizeof(master_image->bus_resource));
- master_image->kern_base = NULL;
- list_add_tail(&master_image->list,
- &ca91cx42_bridge->master_resources);
- }
-
- /* Add slave windows to list */
- for (i = 0; i < CA91C142_MAX_SLAVE; i++) {
- slave_image = kmalloc(sizeof(*slave_image), GFP_KERNEL);
- if (!slave_image) {
- retval = -ENOMEM;
- goto err_slave;
- }
- slave_image->parent = ca91cx42_bridge;
- mutex_init(&slave_image->mtx);
- slave_image->locked = 0;
- slave_image->number = i;
- slave_image->address_attr = VME_A24 | VME_A32 | VME_USER1 |
- VME_USER2;
-
- /* Only windows 0 and 4 support A16 */
- if (i == 0 || i == 4)
- slave_image->address_attr |= VME_A16;
-
- slave_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT |
- VME_SUPER | VME_USER | VME_PROG | VME_DATA;
- list_add_tail(&slave_image->list,
- &ca91cx42_bridge->slave_resources);
- }
-
- /* Add dma engines to list */
- for (i = 0; i < CA91C142_MAX_DMA; i++) {
- dma_ctrlr = kmalloc(sizeof(*dma_ctrlr), GFP_KERNEL);
- if (!dma_ctrlr) {
- retval = -ENOMEM;
- goto err_dma;
- }
- dma_ctrlr->parent = ca91cx42_bridge;
- mutex_init(&dma_ctrlr->mtx);
- dma_ctrlr->locked = 0;
- dma_ctrlr->number = i;
- dma_ctrlr->route_attr = VME_DMA_VME_TO_MEM |
- VME_DMA_MEM_TO_VME;
- INIT_LIST_HEAD(&dma_ctrlr->pending);
- INIT_LIST_HEAD(&dma_ctrlr->running);
- list_add_tail(&dma_ctrlr->list,
- &ca91cx42_bridge->dma_resources);
- }
-
- /* Add location monitor to list */
- lm = kmalloc(sizeof(*lm), GFP_KERNEL);
- if (!lm) {
- retval = -ENOMEM;
- goto err_lm;
- }
- lm->parent = ca91cx42_bridge;
- mutex_init(&lm->mtx);
- lm->locked = 0;
- lm->number = 1;
- lm->monitors = 4;
- list_add_tail(&lm->list, &ca91cx42_bridge->lm_resources);
-
- ca91cx42_bridge->slave_get = ca91cx42_slave_get;
- ca91cx42_bridge->slave_set = ca91cx42_slave_set;
- ca91cx42_bridge->master_get = ca91cx42_master_get;
- ca91cx42_bridge->master_set = ca91cx42_master_set;
- ca91cx42_bridge->master_read = ca91cx42_master_read;
- ca91cx42_bridge->master_write = ca91cx42_master_write;
- ca91cx42_bridge->master_rmw = ca91cx42_master_rmw;
- ca91cx42_bridge->dma_list_add = ca91cx42_dma_list_add;
- ca91cx42_bridge->dma_list_exec = ca91cx42_dma_list_exec;
- ca91cx42_bridge->dma_list_empty = ca91cx42_dma_list_empty;
- ca91cx42_bridge->irq_set = ca91cx42_irq_set;
- ca91cx42_bridge->irq_generate = ca91cx42_irq_generate;
- ca91cx42_bridge->lm_set = ca91cx42_lm_set;
- ca91cx42_bridge->lm_get = ca91cx42_lm_get;
- ca91cx42_bridge->lm_attach = ca91cx42_lm_attach;
- ca91cx42_bridge->lm_detach = ca91cx42_lm_detach;
- ca91cx42_bridge->slot_get = ca91cx42_slot_get;
- ca91cx42_bridge->alloc_consistent = ca91cx42_alloc_consistent;
- ca91cx42_bridge->free_consistent = ca91cx42_free_consistent;
-
- data = ioread32(ca91cx42_device->base + MISC_CTL);
- dev_info(&pdev->dev, "Board is%s the VME system controller\n",
- (data & CA91CX42_MISC_CTL_SYSCON) ? "" : " not");
- dev_info(&pdev->dev, "Slot ID is %d\n",
- ca91cx42_slot_get(ca91cx42_bridge));
-
- if (ca91cx42_crcsr_init(ca91cx42_bridge, pdev))
- dev_err(&pdev->dev, "CR/CSR configuration failed.\n");
-
- /* Need to save ca91cx42_bridge pointer locally in link list for use in
- * ca91cx42_remove()
- */
- retval = vme_register_bridge(ca91cx42_bridge);
- if (retval != 0) {
- dev_err(&pdev->dev, "Chip Registration failed.\n");
- goto err_reg;
- }
-
- pci_set_drvdata(pdev, ca91cx42_bridge);
-
- return 0;
-
-err_reg:
- ca91cx42_crcsr_exit(ca91cx42_bridge, pdev);
-err_lm:
- /* resources are stored in link list */
- list_for_each_safe(pos, n, &ca91cx42_bridge->lm_resources) {
- lm = list_entry(pos, struct vme_lm_resource, list);
- list_del(pos);
- kfree(lm);
- }
-err_dma:
- /* resources are stored in link list */
- list_for_each_safe(pos, n, &ca91cx42_bridge->dma_resources) {
- dma_ctrlr = list_entry(pos, struct vme_dma_resource, list);
- list_del(pos);
- kfree(dma_ctrlr);
- }
-err_slave:
- /* resources are stored in link list */
- list_for_each_safe(pos, n, &ca91cx42_bridge->slave_resources) {
- slave_image = list_entry(pos, struct vme_slave_resource, list);
- list_del(pos);
- kfree(slave_image);
- }
-err_master:
- /* resources are stored in link list */
- list_for_each_safe(pos, n, &ca91cx42_bridge->master_resources) {
- master_image = list_entry(pos, struct vme_master_resource,
- list);
- list_del(pos);
- kfree(master_image);
- }
-
- ca91cx42_irq_exit(ca91cx42_device, pdev);
-err_irq:
-err_test:
- iounmap(ca91cx42_device->base);
-err_remap:
- pci_release_regions(pdev);
-err_resource:
- pci_disable_device(pdev);
-err_enable:
- kfree(ca91cx42_device);
-err_driver:
- kfree(ca91cx42_bridge);
-err_struct:
- return retval;
-
-}
-
-static void ca91cx42_remove(struct pci_dev *pdev)
-{
- struct list_head *pos = NULL, *n;
- struct vme_master_resource *master_image;
- struct vme_slave_resource *slave_image;
- struct vme_dma_resource *dma_ctrlr;
- struct vme_lm_resource *lm;
- struct ca91cx42_driver *bridge;
- struct vme_bridge *ca91cx42_bridge = pci_get_drvdata(pdev);
-
- bridge = ca91cx42_bridge->driver_priv;
-
-
- /* Turn off Ints */
- iowrite32(0, bridge->base + LINT_EN);
-
- /* Turn off the windows */
- iowrite32(0x00800000, bridge->base + LSI0_CTL);
- iowrite32(0x00800000, bridge->base + LSI1_CTL);
- iowrite32(0x00800000, bridge->base + LSI2_CTL);
- iowrite32(0x00800000, bridge->base + LSI3_CTL);
- iowrite32(0x00800000, bridge->base + LSI4_CTL);
- iowrite32(0x00800000, bridge->base + LSI5_CTL);
- iowrite32(0x00800000, bridge->base + LSI6_CTL);
- iowrite32(0x00800000, bridge->base + LSI7_CTL);
- iowrite32(0x00F00000, bridge->base + VSI0_CTL);
- iowrite32(0x00F00000, bridge->base + VSI1_CTL);
- iowrite32(0x00F00000, bridge->base + VSI2_CTL);
- iowrite32(0x00F00000, bridge->base + VSI3_CTL);
- iowrite32(0x00F00000, bridge->base + VSI4_CTL);
- iowrite32(0x00F00000, bridge->base + VSI5_CTL);
- iowrite32(0x00F00000, bridge->base + VSI6_CTL);
- iowrite32(0x00F00000, bridge->base + VSI7_CTL);
-
- vme_unregister_bridge(ca91cx42_bridge);
-
- ca91cx42_crcsr_exit(ca91cx42_bridge, pdev);
-
- /* resources are stored in link list */
- list_for_each_safe(pos, n, &ca91cx42_bridge->lm_resources) {
- lm = list_entry(pos, struct vme_lm_resource, list);
- list_del(pos);
- kfree(lm);
- }
-
- /* resources are stored in link list */
- list_for_each_safe(pos, n, &ca91cx42_bridge->dma_resources) {
- dma_ctrlr = list_entry(pos, struct vme_dma_resource, list);
- list_del(pos);
- kfree(dma_ctrlr);
- }
-
- /* resources are stored in link list */
- list_for_each_safe(pos, n, &ca91cx42_bridge->slave_resources) {
- slave_image = list_entry(pos, struct vme_slave_resource, list);
- list_del(pos);
- kfree(slave_image);
- }
-
- /* resources are stored in link list */
- list_for_each_safe(pos, n, &ca91cx42_bridge->master_resources) {
- master_image = list_entry(pos, struct vme_master_resource,
- list);
- list_del(pos);
- kfree(master_image);
- }
-
- ca91cx42_irq_exit(bridge, pdev);
-
- iounmap(bridge->base);
-
- pci_release_regions(pdev);
-
- pci_disable_device(pdev);
-
- kfree(ca91cx42_bridge);
-}
-
-module_pci_driver(ca91cx42_driver);
-
-MODULE_PARM_DESC(geoid, "Override geographical addressing");
-module_param(geoid, int, 0);
-
-MODULE_DESCRIPTION("VME driver for the Tundra Universe II VME bridge");
-MODULE_LICENSE("GPL");
diff --git a/drivers/vme/bridges/vme_ca91cx42.h b/drivers/vme/bridges/vme_ca91cx42.h
deleted file mode 100644
index 34a8c25..0000000
--- a/drivers/vme/bridges/vme_ca91cx42.h
+++ /dev/null
@@ -1,579 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * ca91c042.h
- *
- * Support for the Tundra Universe 1 and Universe II VME bridge chips
- *
- * Author: Tom Armistead
- * Updated by Ajit Prem
- * Copyright 2004 Motorola Inc.
- *
- * Further updated by Martyn Welch <martyn.welch@ge.com>
- * Copyright 2009 GE Intelligent Platforms Embedded Systems, Inc.
- *
- * Derived from ca91c042.h by Michael Wyrick
- */
-
-#ifndef _CA91CX42_H
-#define _CA91CX42_H
-
-#ifndef PCI_VENDOR_ID_TUNDRA
-#define PCI_VENDOR_ID_TUNDRA 0x10e3
-#endif
-
-#ifndef PCI_DEVICE_ID_TUNDRA_CA91C142
-#define PCI_DEVICE_ID_TUNDRA_CA91C142 0x0000
-#endif
-
-/*
- * Define the number of each that the CA91C142 supports.
- */
-#define CA91C142_MAX_MASTER 8 /* Max Master Windows */
-#define CA91C142_MAX_SLAVE 8 /* Max Slave Windows */
-#define CA91C142_MAX_DMA 1 /* Max DMA Controllers */
-#define CA91C142_MAX_MAILBOX 4 /* Max Mail Box registers */
-
-/* Structure used to hold driver specific information */
-struct ca91cx42_driver {
- void __iomem *base; /* Base Address of device registers */
- wait_queue_head_t dma_queue;
- wait_queue_head_t iack_queue;
- wait_queue_head_t mbox_queue;
- void (*lm_callback[4])(void *); /* Called in interrupt handler */
- void *lm_data[4];
- void *crcsr_kernel;
- dma_addr_t crcsr_bus;
- struct mutex vme_rmw; /* Only one RMW cycle at a time */
- struct mutex vme_int; /*
- * Only one VME interrupt can be
- * generated at a time, provide locking
- */
-};
-
-/* See Page 2-77 in the Universe User Manual */
-struct ca91cx42_dma_descriptor {
- unsigned int dctl; /* DMA Control */
- unsigned int dtbc; /* Transfer Byte Count */
- unsigned int dla; /* PCI Address */
- unsigned int res1; /* Reserved */
- unsigned int dva; /* Vme Address */
- unsigned int res2; /* Reserved */
- unsigned int dcpp; /* Pointer to Numed Cmd Packet with rPN */
- unsigned int res3; /* Reserved */
-};
-
-struct ca91cx42_dma_entry {
- struct ca91cx42_dma_descriptor descriptor;
- struct list_head list;
-};
-
-/* Universe Register Offsets */
-/* general PCI configuration registers */
-#define CA91CX42_PCI_ID 0x000
-#define CA91CX42_PCI_CSR 0x004
-#define CA91CX42_PCI_CLASS 0x008
-#define CA91CX42_PCI_MISC0 0x00C
-#define CA91CX42_PCI_BS 0x010
-#define CA91CX42_PCI_MISC1 0x03C
-
-#define LSI0_CTL 0x0100
-#define LSI0_BS 0x0104
-#define LSI0_BD 0x0108
-#define LSI0_TO 0x010C
-
-#define LSI1_CTL 0x0114
-#define LSI1_BS 0x0118
-#define LSI1_BD 0x011C
-#define LSI1_TO 0x0120
-
-#define LSI2_CTL 0x0128
-#define LSI2_BS 0x012C
-#define LSI2_BD 0x0130
-#define LSI2_TO 0x0134
-
-#define LSI3_CTL 0x013C
-#define LSI3_BS 0x0140
-#define LSI3_BD 0x0144
-#define LSI3_TO 0x0148
-
-#define LSI4_CTL 0x01A0
-#define LSI4_BS 0x01A4
-#define LSI4_BD 0x01A8
-#define LSI4_TO 0x01AC
-
-#define LSI5_CTL 0x01B4
-#define LSI5_BS 0x01B8
-#define LSI5_BD 0x01BC
-#define LSI5_TO 0x01C0
-
-#define LSI6_CTL 0x01C8
-#define LSI6_BS 0x01CC
-#define LSI6_BD 0x01D0
-#define LSI6_TO 0x01D4
-
-#define LSI7_CTL 0x01DC
-#define LSI7_BS 0x01E0
-#define LSI7_BD 0x01E4
-#define LSI7_TO 0x01E8
-
-static const int CA91CX42_LSI_CTL[] = { LSI0_CTL, LSI1_CTL, LSI2_CTL, LSI3_CTL,
- LSI4_CTL, LSI5_CTL, LSI6_CTL, LSI7_CTL };
-
-static const int CA91CX42_LSI_BS[] = { LSI0_BS, LSI1_BS, LSI2_BS, LSI3_BS,
- LSI4_BS, LSI5_BS, LSI6_BS, LSI7_BS };
-
-static const int CA91CX42_LSI_BD[] = { LSI0_BD, LSI1_BD, LSI2_BD, LSI3_BD,
- LSI4_BD, LSI5_BD, LSI6_BD, LSI7_BD };
-
-static const int CA91CX42_LSI_TO[] = { LSI0_TO, LSI1_TO, LSI2_TO, LSI3_TO,
- LSI4_TO, LSI5_TO, LSI6_TO, LSI7_TO };
-
-#define SCYC_CTL 0x0170
-#define SCYC_ADDR 0x0174
-#define SCYC_EN 0x0178
-#define SCYC_CMP 0x017C
-#define SCYC_SWP 0x0180
-#define LMISC 0x0184
-#define SLSI 0x0188
-#define L_CMDERR 0x018C
-#define LAERR 0x0190
-
-#define DCTL 0x0200
-#define DTBC 0x0204
-#define DLA 0x0208
-#define DVA 0x0210
-#define DCPP 0x0218
-#define DGCS 0x0220
-#define D_LLUE 0x0224
-
-#define LINT_EN 0x0300
-#define LINT_STAT 0x0304
-#define LINT_MAP0 0x0308
-#define LINT_MAP1 0x030C
-#define VINT_EN 0x0310
-#define VINT_STAT 0x0314
-#define VINT_MAP0 0x0318
-#define VINT_MAP1 0x031C
-#define STATID 0x0320
-
-#define V1_STATID 0x0324
-#define V2_STATID 0x0328
-#define V3_STATID 0x032C
-#define V4_STATID 0x0330
-#define V5_STATID 0x0334
-#define V6_STATID 0x0338
-#define V7_STATID 0x033C
-
-static const int CA91CX42_V_STATID[8] = { 0, V1_STATID, V2_STATID, V3_STATID,
- V4_STATID, V5_STATID, V6_STATID,
- V7_STATID };
-
-#define LINT_MAP2 0x0340
-#define VINT_MAP2 0x0344
-
-#define MBOX0 0x0348
-#define MBOX1 0x034C
-#define MBOX2 0x0350
-#define MBOX3 0x0354
-#define SEMA0 0x0358
-#define SEMA1 0x035C
-
-#define MAST_CTL 0x0400
-#define MISC_CTL 0x0404
-#define MISC_STAT 0x0408
-#define USER_AM 0x040C
-
-#define VSI0_CTL 0x0F00
-#define VSI0_BS 0x0F04
-#define VSI0_BD 0x0F08
-#define VSI0_TO 0x0F0C
-
-#define VSI1_CTL 0x0F14
-#define VSI1_BS 0x0F18
-#define VSI1_BD 0x0F1C
-#define VSI1_TO 0x0F20
-
-#define VSI2_CTL 0x0F28
-#define VSI2_BS 0x0F2C
-#define VSI2_BD 0x0F30
-#define VSI2_TO 0x0F34
-
-#define VSI3_CTL 0x0F3C
-#define VSI3_BS 0x0F40
-#define VSI3_BD 0x0F44
-#define VSI3_TO 0x0F48
-
-#define LM_CTL 0x0F64
-#define LM_BS 0x0F68
-
-#define VRAI_CTL 0x0F70
-
-#define VRAI_BS 0x0F74
-#define VCSR_CTL 0x0F80
-#define VCSR_TO 0x0F84
-#define V_AMERR 0x0F88
-#define VAERR 0x0F8C
-
-#define VSI4_CTL 0x0F90
-#define VSI4_BS 0x0F94
-#define VSI4_BD 0x0F98
-#define VSI4_TO 0x0F9C
-
-#define VSI5_CTL 0x0FA4
-#define VSI5_BS 0x0FA8
-#define VSI5_BD 0x0FAC
-#define VSI5_TO 0x0FB0
-
-#define VSI6_CTL 0x0FB8
-#define VSI6_BS 0x0FBC
-#define VSI6_BD 0x0FC0
-#define VSI6_TO 0x0FC4
-
-#define VSI7_CTL 0x0FCC
-#define VSI7_BS 0x0FD0
-#define VSI7_BD 0x0FD4
-#define VSI7_TO 0x0FD8
-
-static const int CA91CX42_VSI_CTL[] = { VSI0_CTL, VSI1_CTL, VSI2_CTL, VSI3_CTL,
- VSI4_CTL, VSI5_CTL, VSI6_CTL, VSI7_CTL };
-
-static const int CA91CX42_VSI_BS[] = { VSI0_BS, VSI1_BS, VSI2_BS, VSI3_BS,
- VSI4_BS, VSI5_BS, VSI6_BS, VSI7_BS };
-
-static const int CA91CX42_VSI_BD[] = { VSI0_BD, VSI1_BD, VSI2_BD, VSI3_BD,
- VSI4_BD, VSI5_BD, VSI6_BD, VSI7_BD };
-
-static const int CA91CX42_VSI_TO[] = { VSI0_TO, VSI1_TO, VSI2_TO, VSI3_TO,
- VSI4_TO, VSI5_TO, VSI6_TO, VSI7_TO };
-
-#define VCSR_CLR 0x0FF4
-#define VCSR_SET 0x0FF8
-#define VCSR_BS 0x0FFC
-
-/*
- * PCI Class Register
- * offset 008
- */
-#define CA91CX42_BM_PCI_CLASS_BASE 0xFF000000
-#define CA91CX42_OF_PCI_CLASS_BASE 24
-#define CA91CX42_BM_PCI_CLASS_SUB 0x00FF0000
-#define CA91CX42_OF_PCI_CLASS_SUB 16
-#define CA91CX42_BM_PCI_CLASS_PROG 0x0000FF00
-#define CA91CX42_OF_PCI_CLASS_PROG 8
-#define CA91CX42_BM_PCI_CLASS_RID 0x000000FF
-#define CA91CX42_OF_PCI_CLASS_RID 0
-
-#define CA91CX42_OF_PCI_CLASS_RID_UNIVERSE_I 0
-#define CA91CX42_OF_PCI_CLASS_RID_UNIVERSE_II 1
-
-/*
- * PCI Misc Register
- * offset 00C
- */
-#define CA91CX42_BM_PCI_MISC0_BISTC 0x80000000
-#define CA91CX42_BM_PCI_MISC0_SBIST 0x60000000
-#define CA91CX42_BM_PCI_MISC0_CCODE 0x0F000000
-#define CA91CX42_BM_PCI_MISC0_MFUNCT 0x00800000
-#define CA91CX42_BM_PCI_MISC0_LAYOUT 0x007F0000
-#define CA91CX42_BM_PCI_MISC0_LTIMER 0x0000FF00
-#define CA91CX42_OF_PCI_MISC0_LTIMER 8
-
-
-/*
- * LSI Control Register
- * offset 100
- */
-#define CA91CX42_LSI_CTL_EN (1<<31)
-#define CA91CX42_LSI_CTL_PWEN (1<<30)
-
-#define CA91CX42_LSI_CTL_VDW_M (3<<22)
-#define CA91CX42_LSI_CTL_VDW_D8 0
-#define CA91CX42_LSI_CTL_VDW_D16 (1<<22)
-#define CA91CX42_LSI_CTL_VDW_D32 (1<<23)
-#define CA91CX42_LSI_CTL_VDW_D64 (3<<22)
-
-#define CA91CX42_LSI_CTL_VAS_M (7<<16)
-#define CA91CX42_LSI_CTL_VAS_A16 0
-#define CA91CX42_LSI_CTL_VAS_A24 (1<<16)
-#define CA91CX42_LSI_CTL_VAS_A32 (1<<17)
-#define CA91CX42_LSI_CTL_VAS_CRCSR (5<<16)
-#define CA91CX42_LSI_CTL_VAS_USER1 (3<<17)
-#define CA91CX42_LSI_CTL_VAS_USER2 (7<<16)
-
-#define CA91CX42_LSI_CTL_PGM_M (1<<14)
-#define CA91CX42_LSI_CTL_PGM_DATA 0
-#define CA91CX42_LSI_CTL_PGM_PGM (1<<14)
-
-#define CA91CX42_LSI_CTL_SUPER_M (1<<12)
-#define CA91CX42_LSI_CTL_SUPER_NPRIV 0
-#define CA91CX42_LSI_CTL_SUPER_SUPR (1<<12)
-
-#define CA91CX42_LSI_CTL_VCT_M (1<<8)
-#define CA91CX42_LSI_CTL_VCT_BLT (1<<8)
-#define CA91CX42_LSI_CTL_VCT_MBLT (1<<8)
-#define CA91CX42_LSI_CTL_LAS (1<<0)
-
-/*
- * SCYC_CTL Register
- * offset 178
- */
-#define CA91CX42_SCYC_CTL_LAS_PCIMEM 0
-#define CA91CX42_SCYC_CTL_LAS_PCIIO (1<<2)
-
-#define CA91CX42_SCYC_CTL_CYC_M (3<<0)
-#define CA91CX42_SCYC_CTL_CYC_RMW (1<<0)
-#define CA91CX42_SCYC_CTL_CYC_ADOH (1<<1)
-
-/*
- * LMISC Register
- * offset 184
- */
-#define CA91CX42_BM_LMISC_CRT 0xF0000000
-#define CA91CX42_OF_LMISC_CRT 28
-#define CA91CX42_BM_LMISC_CWT 0x0F000000
-#define CA91CX42_OF_LMISC_CWT 24
-
-/*
- * SLSI Register
- * offset 188
- */
-#define CA91CX42_BM_SLSI_EN 0x80000000
-#define CA91CX42_BM_SLSI_PWEN 0x40000000
-#define CA91CX42_BM_SLSI_VDW 0x00F00000
-#define CA91CX42_OF_SLSI_VDW 20
-#define CA91CX42_BM_SLSI_PGM 0x0000F000
-#define CA91CX42_OF_SLSI_PGM 12
-#define CA91CX42_BM_SLSI_SUPER 0x00000F00
-#define CA91CX42_OF_SLSI_SUPER 8
-#define CA91CX42_BM_SLSI_BS 0x000000F6
-#define CA91CX42_OF_SLSI_BS 2
-#define CA91CX42_BM_SLSI_LAS 0x00000003
-#define CA91CX42_OF_SLSI_LAS 0
-#define CA91CX42_BM_SLSI_RESERVED 0x3F0F0000
-
-/*
- * DCTL Register
- * offset 200
- */
-#define CA91CX42_DCTL_L2V (1<<31)
-#define CA91CX42_DCTL_VDW_M (3<<22)
-#define CA91CX42_DCTL_VDW_D8 0
-#define CA91CX42_DCTL_VDW_D16 (1<<22)
-#define CA91CX42_DCTL_VDW_D32 (1<<23)
-#define CA91CX42_DCTL_VDW_D64 (3<<22)
-
-#define CA91CX42_DCTL_VAS_M (7<<16)
-#define CA91CX42_DCTL_VAS_A16 0
-#define CA91CX42_DCTL_VAS_A24 (1<<16)
-#define CA91CX42_DCTL_VAS_A32 (1<<17)
-#define CA91CX42_DCTL_VAS_USER1 (3<<17)
-#define CA91CX42_DCTL_VAS_USER2 (7<<16)
-
-#define CA91CX42_DCTL_PGM_M (1<<14)
-#define CA91CX42_DCTL_PGM_DATA 0
-#define CA91CX42_DCTL_PGM_PGM (1<<14)
-
-#define CA91CX42_DCTL_SUPER_M (1<<12)
-#define CA91CX42_DCTL_SUPER_NPRIV 0
-#define CA91CX42_DCTL_SUPER_SUPR (1<<12)
-
-#define CA91CX42_DCTL_VCT_M (1<<8)
-#define CA91CX42_DCTL_VCT_BLT (1<<8)
-#define CA91CX42_DCTL_LD64EN (1<<7)
-
-/*
- * DCPP Register
- * offset 218
- */
-#define CA91CX42_DCPP_M 0xf
-#define CA91CX42_DCPP_NULL (1<<0)
-
-/*
- * DMA General Control/Status Register (DGCS)
- * offset 220
- */
-#define CA91CX42_DGCS_GO (1<<31)
-#define CA91CX42_DGCS_STOP_REQ (1<<30)
-#define CA91CX42_DGCS_HALT_REQ (1<<29)
-#define CA91CX42_DGCS_CHAIN (1<<27)
-
-#define CA91CX42_DGCS_VON_M (7<<20)
-
-#define CA91CX42_DGCS_VOFF_M (0xf<<16)
-
-#define CA91CX42_DGCS_ACT (1<<15)
-#define CA91CX42_DGCS_STOP (1<<14)
-#define CA91CX42_DGCS_HALT (1<<13)
-#define CA91CX42_DGCS_DONE (1<<11)
-#define CA91CX42_DGCS_LERR (1<<10)
-#define CA91CX42_DGCS_VERR (1<<9)
-#define CA91CX42_DGCS_PERR (1<<8)
-#define CA91CX42_DGCS_INT_STOP (1<<6)
-#define CA91CX42_DGCS_INT_HALT (1<<5)
-#define CA91CX42_DGCS_INT_DONE (1<<3)
-#define CA91CX42_DGCS_INT_LERR (1<<2)
-#define CA91CX42_DGCS_INT_VERR (1<<1)
-#define CA91CX42_DGCS_INT_PERR (1<<0)
-
-/*
- * PCI Interrupt Enable Register
- * offset 300
- */
-#define CA91CX42_LINT_LM3 0x00800000
-#define CA91CX42_LINT_LM2 0x00400000
-#define CA91CX42_LINT_LM1 0x00200000
-#define CA91CX42_LINT_LM0 0x00100000
-#define CA91CX42_LINT_MBOX3 0x00080000
-#define CA91CX42_LINT_MBOX2 0x00040000
-#define CA91CX42_LINT_MBOX1 0x00020000
-#define CA91CX42_LINT_MBOX0 0x00010000
-#define CA91CX42_LINT_ACFAIL 0x00008000
-#define CA91CX42_LINT_SYSFAIL 0x00004000
-#define CA91CX42_LINT_SW_INT 0x00002000
-#define CA91CX42_LINT_SW_IACK 0x00001000
-
-#define CA91CX42_LINT_VERR 0x00000400
-#define CA91CX42_LINT_LERR 0x00000200
-#define CA91CX42_LINT_DMA 0x00000100
-#define CA91CX42_LINT_VIRQ7 0x00000080
-#define CA91CX42_LINT_VIRQ6 0x00000040
-#define CA91CX42_LINT_VIRQ5 0x00000020
-#define CA91CX42_LINT_VIRQ4 0x00000010
-#define CA91CX42_LINT_VIRQ3 0x00000008
-#define CA91CX42_LINT_VIRQ2 0x00000004
-#define CA91CX42_LINT_VIRQ1 0x00000002
-#define CA91CX42_LINT_VOWN 0x00000001
-
-static const int CA91CX42_LINT_VIRQ[] = { 0, CA91CX42_LINT_VIRQ1,
- CA91CX42_LINT_VIRQ2, CA91CX42_LINT_VIRQ3,
- CA91CX42_LINT_VIRQ4, CA91CX42_LINT_VIRQ5,
- CA91CX42_LINT_VIRQ6, CA91CX42_LINT_VIRQ7 };
-
-#define CA91CX42_LINT_MBOX 0x000F0000
-
-static const int CA91CX42_LINT_LM[] = { CA91CX42_LINT_LM0, CA91CX42_LINT_LM1,
- CA91CX42_LINT_LM2, CA91CX42_LINT_LM3 };
-
-/*
- * MAST_CTL Register
- * offset 400
- */
-#define CA91CX42_BM_MAST_CTL_MAXRTRY 0xF0000000
-#define CA91CX42_OF_MAST_CTL_MAXRTRY 28
-#define CA91CX42_BM_MAST_CTL_PWON 0x0F000000
-#define CA91CX42_OF_MAST_CTL_PWON 24
-#define CA91CX42_BM_MAST_CTL_VRL 0x00C00000
-#define CA91CX42_OF_MAST_CTL_VRL 22
-#define CA91CX42_BM_MAST_CTL_VRM 0x00200000
-#define CA91CX42_BM_MAST_CTL_VREL 0x00100000
-#define CA91CX42_BM_MAST_CTL_VOWN 0x00080000
-#define CA91CX42_BM_MAST_CTL_VOWN_ACK 0x00040000
-#define CA91CX42_BM_MAST_CTL_PABS 0x00001000
-#define CA91CX42_BM_MAST_CTL_BUS_NO 0x0000000F
-#define CA91CX42_OF_MAST_CTL_BUS_NO 0
-
-/*
- * MISC_CTL Register
- * offset 404
- */
-#define CA91CX42_MISC_CTL_VBTO 0xF0000000
-#define CA91CX42_MISC_CTL_VARB 0x04000000
-#define CA91CX42_MISC_CTL_VARBTO 0x03000000
-#define CA91CX42_MISC_CTL_SW_LRST 0x00800000
-#define CA91CX42_MISC_CTL_SW_SRST 0x00400000
-#define CA91CX42_MISC_CTL_BI 0x00100000
-#define CA91CX42_MISC_CTL_ENGBI 0x00080000
-#define CA91CX42_MISC_CTL_RESCIND 0x00040000
-#define CA91CX42_MISC_CTL_SYSCON 0x00020000
-#define CA91CX42_MISC_CTL_V64AUTO 0x00010000
-#define CA91CX42_MISC_CTL_RESERVED 0x0820FFFF
-
-#define CA91CX42_OF_MISC_CTL_VARBTO 24
-#define CA91CX42_OF_MISC_CTL_VBTO 28
-
-/*
- * MISC_STAT Register
- * offset 408
- */
-#define CA91CX42_BM_MISC_STAT_ENDIAN 0x80000000
-#define CA91CX42_BM_MISC_STAT_LCLSIZE 0x40000000
-#define CA91CX42_BM_MISC_STAT_DY4AUTO 0x08000000
-#define CA91CX42_BM_MISC_STAT_MYBBSY 0x00200000
-#define CA91CX42_BM_MISC_STAT_DY4DONE 0x00080000
-#define CA91CX42_BM_MISC_STAT_TXFE 0x00040000
-#define CA91CX42_BM_MISC_STAT_RXFE 0x00020000
-#define CA91CX42_BM_MISC_STAT_DY4AUTOID 0x0000FF00
-#define CA91CX42_OF_MISC_STAT_DY4AUTOID 8
-
-/*
- * VSI Control Register
- * offset F00
- */
-#define CA91CX42_VSI_CTL_EN (1<<31)
-#define CA91CX42_VSI_CTL_PWEN (1<<30)
-#define CA91CX42_VSI_CTL_PREN (1<<29)
-
-#define CA91CX42_VSI_CTL_PGM_M (3<<22)
-#define CA91CX42_VSI_CTL_PGM_DATA (1<<22)
-#define CA91CX42_VSI_CTL_PGM_PGM (1<<23)
-
-#define CA91CX42_VSI_CTL_SUPER_M (3<<20)
-#define CA91CX42_VSI_CTL_SUPER_NPRIV (1<<20)
-#define CA91CX42_VSI_CTL_SUPER_SUPR (1<<21)
-
-#define CA91CX42_VSI_CTL_VAS_M (7<<16)
-#define CA91CX42_VSI_CTL_VAS_A16 0
-#define CA91CX42_VSI_CTL_VAS_A24 (1<<16)
-#define CA91CX42_VSI_CTL_VAS_A32 (1<<17)
-#define CA91CX42_VSI_CTL_VAS_USER1 (3<<17)
-#define CA91CX42_VSI_CTL_VAS_USER2 (7<<16)
-
-#define CA91CX42_VSI_CTL_LD64EN (1<<7)
-#define CA91CX42_VSI_CTL_LLRMW (1<<6)
-
-#define CA91CX42_VSI_CTL_LAS_M (3<<0)
-#define CA91CX42_VSI_CTL_LAS_PCI_MS 0
-#define CA91CX42_VSI_CTL_LAS_PCI_IO (1<<0)
-#define CA91CX42_VSI_CTL_LAS_PCI_CONF (1<<1)
-
-/* LM_CTL Register
- * offset F64
- */
-#define CA91CX42_LM_CTL_EN (1<<31)
-#define CA91CX42_LM_CTL_PGM (1<<23)
-#define CA91CX42_LM_CTL_DATA (1<<22)
-#define CA91CX42_LM_CTL_SUPR (1<<21)
-#define CA91CX42_LM_CTL_NPRIV (1<<20)
-#define CA91CX42_LM_CTL_AS_M (7<<16)
-#define CA91CX42_LM_CTL_AS_A16 0
-#define CA91CX42_LM_CTL_AS_A24 (1<<16)
-#define CA91CX42_LM_CTL_AS_A32 (1<<17)
-
-/*
- * VRAI_CTL Register
- * offset F70
- */
-#define CA91CX42_BM_VRAI_CTL_EN 0x80000000
-#define CA91CX42_BM_VRAI_CTL_PGM 0x00C00000
-#define CA91CX42_OF_VRAI_CTL_PGM 22
-#define CA91CX42_BM_VRAI_CTL_SUPER 0x00300000
-#define CA91CX42_OF_VRAI_CTL_SUPER 20
-#define CA91CX42_BM_VRAI_CTL_VAS 0x00030000
-#define CA91CX42_OF_VRAI_CTL_VAS 16
-
-/* VCSR_CTL Register
- * offset F80
- */
-#define CA91CX42_VCSR_CTL_EN (1<<31)
-
-#define CA91CX42_VCSR_CTL_LAS_M (3<<0)
-#define CA91CX42_VCSR_CTL_LAS_PCI_MS 0
-#define CA91CX42_VCSR_CTL_LAS_PCI_IO (1<<0)
-#define CA91CX42_VCSR_CTL_LAS_PCI_CONF (1<<1)
-
-/* VCSR_BS Register
- * offset FFC
- */
-#define CA91CX42_VCSR_BS_SLOT_M (0x1F<<27)
-
-#endif /* _CA91CX42_H */
