blob: c1348db593746a89083d1efd6b43f669702fefcc [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K3 SoC Watchdog Timer
maintainers:
- Tero Kristo <t-kristo@ti.com>
description:
The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
Interrupt) IP module. This timer adds a support for windowed watchdog
mode, which will signal an error if it is pinged outside the watchdog
time window, meaning either too early or too late. The error signal
generated can be routed to either interrupt a safety controller or
to directly reset the SoC.
allOf:
- $ref: "watchdog.yaml#"
properties:
compatible:
enum:
- ti,j7-rti-wdt
reg:
maxItems: 1
clocks:
maxItems: 1
power-domains:
maxItems: 1
assigned-clocks:
maxItems: 1
assigned-clocks-parents:
maxItems: 1
required:
- compatible
- reg
- clocks
- power-domains
unevaluatedProperties: false
examples:
- |
/*
* RTI WDT in main domain on J721e SoC. Assigned clocks are used to
* select the source clock for the watchdog, forcing it to tick with
* a 32kHz clock in this case.
*/
#include <dt-bindings/soc/ti,sci_pm_domain.h>
watchdog0: rti@2200000 {
compatible = "ti,rti-wdt";
reg = <0x2200000 0x100>;
clocks = <&k3_clks 252 1>;
power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 252 1>;
assigned-clock-parents = <&k3_clks 252 5>;
};